Is RISC-V the Future?

Is RISC-V the future? This is a question that we often get asked, and let’s assume that we mean ‘is the RISC-V going to be the dominant ISA in the processor market?’. This is certainly an unfolding situation and has changed significantly in the last five years.

Domain-Specific Accelerators

For about fifty years, IC designers have been relying on different types of semiconductor scaling to achieve gains in performance. How do they do it when Moore’s Law and Dennard Scaling have been broken?

What is an ASIP?

ASIP stands for “application-specific instruction-set processor” and simply means a processor which has been designed to be optimal for a particular application or domain. So what exactly is the difference from a general-purpose processor?

What does RISC-V stand for?

Many SoC designers are already familiar with the benefits of RISC-V, the open and extensible computer architecture. But what does the name stand for?

What is CodAL?

CodAL is central to developing a processor core using Codasip Studio. It is a C-based language developed from the outset to describe all aspects of a processor including both the instruction set architecture (ISA) and microarchitecture.

Customizing an Existing RISC-V Processor

In the previous post we considered how you could create an optimized ISA for a domain-specific processor core by profiling software and experimenting with adding/removing instructions. Using the open RISC-V ISA can be a great starting point for a processor that combines application-specific capabilities and access to portable software.

Does ISA ownership matter? A Tale of Three ISAs

An instruction set architecture (ISA) is crucial to the development of processors and their software ecosystems. Does ISA ownership matter? Let’s consider three proprietary ISAs and their history to find out.