Semiconductor scaling is failing to meet designers’ needs, customers want more heterogeneous compute” and “domain specific acceleration”
Customization arises from optimizing a processor IP core to handle a certain workload. In some case it makes sense to design a dedicated core from scratch, but in many cases an existing core may partially meet your requirements and can be a good starting point for your optimized core.
Customization arises from optimizing a processor IP core to handle a certain workload. In some case it makes sense to design a dedicated core from scratch, but in many cases an existing core may partially meet your requirements and can be a good starting point for your optimized core.
For many years, people have been talking about configuring processor IP cores, but especially with growing interest in the open RISC-V ISA, there is much more talk about customization. So, what is the difference?
Is RISC-V the future? This is a question that we often get asked, and let’s assume that we mean ‘is the RISC-V going to be the dominant ISA in the processor market?’. This is certainly an unfolding situation and has changed significantly in the last five years.
For about fifty years, IC designers have been relying on different types of semiconductor scaling to achieve gains in performance. How do they do it when Moore’s Law and Dennard Scaling have been broken?
ASIP stands for “application-specific instruction-set processor” and simply means a processor which has been designed to be optimal for a particular application or domain. So what exactly is the difference from a general-purpose processor?
Many SoC designers are already familiar with the benefits of RISC-V, the open and extensible computer architecture. But what does the name stand for?
CodAL is central to developing a processor core using Codasip Studio. It is a C-based language developed from the outset to describe all aspects of a processor including both the instruction set architecture (ISA) and microarchitecture.
In the previous post we considered how you could create an optimized ISA for a domain-specific processor core by profiling software and experimenting with adding/removing instructions. Using the open RISC-V ISA can be a great starting point for a processor that combines application-specific capabilities and access to portable software.
