We will keep you posted about our endeavors to make ASICs more accessible.
CodAL, standing for Codasip Architectural Language, is central to developing a processor core using Codasip Studio. The language has a C-like syntax and it merges good practices and code constructs from conventional programming languages and hardware description languages. Discover all its benefits.
In the previous post we considered how you could create an optimized ISA for a domain-specific processor core by profiling software and experimenting with adding/removing instructions. Using the open RISC-V ISA can be a great starting point for a processor that combines application-specific capabilities and access to portable software.
If you are going to create a domain-specific processor, one of the key activities is to choose an instruction set that matches your software needs. So where do you start?
An instruction set architecture (ISA) is crucial to the development of processors and their software ecosystems. Does ISA ownership matter? Let’s consider three proprietary ISAs and their history to find out.
Everybody is familiar with commercial licensing from traditional processor IP vendors. In discussing RISC-V, there is widespread confusion of terminology with RISC-V often being described as “open source”, often understood as “free”. But what is reality?
The area of any part of a design contributes both to the silicon cost and to the power consumption, but a simplistic following of the “A” in a processor IP vendor’s PPA numbers can be misleading. What do you need to know?
For each embedded product, software developers need to consider whether they need an operating system; and if so, what type of an OS. Operating systems vary considerably and the choice of one for your processor core has important implications. Let us explore them.
Looking at any processor IP, you will find that their vendors emphasise PPA (performance, power & area) numbers. In theory, they should provide a level playing field for comparing different processor IP cores, but in reality, the situation is more complex. Let us consider performance.
Looking at any processor IP, you will find that their vendors emphasise PPA (performance, power & area) numbers. In theory, they should provide a level playing field for comparing different processor IP cores, but in reality, the situation is more complex. Let us consider performance.
In the last three months, Codasip’s RISC-V processor offering has expanded considerably. For some years, Codasip has supplied Bk3 and Bk5 RISC-V cores aimed at low- to medium-complexity embedded applications. But recently four additional cores have joined the Codasip RISC-V offering.
