Understanding the Performance of Processor IP Cores

Looking at any processor IP, you will find that their vendors emphasise PPA (performance, power & area) numbers. In theory, they should provide a level playing field for comparing different processor IP cores, but in reality, the situation is more complex. Let us consider performance.

Codasip’s Expanding RISC-V Offering

In the last three months, Codasip’s RISC-V processor offering has expanded considerably. For some years, Codasip has supplied Bk3 and Bk5 RISC-V cores aimed at low- to medium-complexity embedded applications. But recently four additional cores have joined the Codasip RISC-V offering.

What is SweRV Core EH2?

In mid-May, CHIPS Alliance announced the open sourcing of the SweRV Core™ EH2 and SweRV Core EL2 designed by Western Digital. These cores, as well as the earlier EH1, are now supported by Codasip’s SweRV Core Support Package which provides all of the components necessary to design, implement, test, and write software for a SweRV Core-based system-on-chip. But what is SweRV Core EH2?

More than Moore with Domain-Specific Processors

The Moore’s law has had remarkably long validity of almost half a century. Today, however, it is ceasing to apply, opening new pressing questions such as: How to make up for the fact that chip size cannot be effectively reduced any more? What is the new way to improve performance? Roddy’s blogpost digs into one of the most promising answers: Core customization. Read on!

Does RISC-V mean Open Source Processors?

So, RISC-V is an Open ISA, that means a RISC-V processor core is Open Source. This is a statement that I have often heard this year – however, is it true or false? Before answering this, let’s consider the broader issue of whether open standards automatically mean open source. Open standards are widespread in technology. The communication protocols TCP/IP have …

A Tale of Two Approaches to High-Performance IoT

Extensible Processors vs Accelerators – and how RISC-V changes the dynamic If you were to ask any good designer today what is the best architecture for an SoC that needs to manage complex DSP or high bandwidth traffic demands – you will almost always find the recommendation of using one or more off-the-shelf processors, complimented by hardware accelerators to offload …

What is RISC-V? Why Do We Care and Why You Should Too!

I’d like to start by talking about the biggest misconception regarding RISC-V. Many of you who have heard about RISC-V likely believe it is an open-source processor … but it is not. So what is it? RISC-V is an open specification of an Instruction Set Architecture (ISA). That is, it describes the way in which software talks to an underlying …