Here you can find all News, Press Releases and Whitepapers
Using open-source is appealing, but also challenging. Can there be solid support for open core deployment? What will be the “Linux way” in the hardware domain?
It is often implied that if you use an open source processor core there are no costs associated with using it. Is that actually true?
Codasip is pleased to announce the availability of Codasip Studio and Codasip CodeSpace 8.3.0. Key features of this release: Minimal runtime library and minimal runtime Memory Interface Arbiter Tightly Coupled Memory Full changelog is available at: https://support.codasip.com/downloads/changelog/ The release is available in the Downloads section of our website: https://support.codasip.com/downloads/software/ Any feedback on this release is welcome. Share it with us …
Codasip announces that it has received a Horizon 2020 award from the European Union. The award is aimed at developing processor cores for the rapidly growing market for integrated circuits for Internet of Things (IoT), connected cars, drones, and artificial intelligence.
Codasip is pleased to announce the availability of Codasip Studio and Codasip CodeSpace 8.2.0. Key features of this release: Support of Compiler Security Features Support of C++ Applications (LLVM 8.0.0) Support of RISC-V External Debug Interface Full changelog is available at: https://support.codasip.com/downloads/changelog/ The release is available in the Downloads section of our website: https://support.codasip.com/downloads/software/ Any feedback on this release is …
Codasip introduces SweRV Support Package, a comprehensive service for users of SweRV, the new RISC-V superscalar core developed by Western Digital and available free of charge within the CHIPS Alliance repository.
CHIPS Alliance, the leading consortium advancing common, open hardware for interfaces, processors and systems, today announced that Codasip GmbH and Munich University of Applied Science have joined the CHIPS Alliance.
Jump threading is a type of compilation optimization that aims to produce faster code. Codasip introduced its own implementation of jump threading in its LLVM-based compiler that is a part of Codasip’s unique tool suite, Codasip Studio. Our latest whitepaper describes how the implementation works and how it can be used to improve speed of a program execution, earning better benchmarks along the way.
Codasip is pleased to announce the availability of Codasip Studio and Codasip CodeSpace 8.1.0. Key features of this release: Added support for SW breakpoints Added support for Synopsys VCS Full changelog is available at: https://support.codasip.com/downloads/changelog/ The release is available in the Downloads section of our website: https://support.codasip.com/downloads/software/ Any feedback on this release is welcome. Share it with us on [email protected]
Codasip GmbH, the leading supplier of configurable RISC-V® embedded processor IP, has selected Questa® SLEC by Mentor for use as part of its comprehensive verification flow. The Codasip verification team expects this will significantly reduce the time needed to ensure logical equivalence of multiple HDL representations of each of its processors.
