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Another upcoming RISC-V event that will be hosting Codasip is the RISC-V Day Shanghai, held on Saturday June 30th at Fudan University in Shanghai, China. Codasip will be featured in the Commercial/Open Source RISC-V stream, in a presentation slot at 10.45. Codasip’s CTO Zdeněk Přikryl will be having a speech on the customization functionality and features added to the latest version …
Codasip is pleased to announce the availability of Codasip Studio and Codasip CodeSpace 7.1.0. Key features of this release: On-chip debugger with optional Nexus Trace support, integration of LLVM 5.0.1, support for nested emulations, support of Visual Studio 2017, minor improvements and bug fixes. Full changelog is available at: https://support.codasip.com/downloads/changelog/ The release is available in the Downloads section of our …
Brno, Czech Republic, and Seoul, Korea – March 23rd 2018 – Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Dongwoon Anatech, a technology leader in analog and power ICs for mobile phones, has selected Codasip’s Bk3 processor and Studio design tool for its next generation family of motor control IC products. Dongwoon Anatech, fabless analog semiconductor …
Campbell, California – April 9th 2018 – Codasip, the leading supplier of RISC-V® embedded processor intellectual property, today announced that Jerry Ardizzone has joined as Vice President of Worldwide Sales, reporting to CEO Karel Masařík. “We are very excited to have Jerry on board to lead our global sales efforts,” declared Karel Masařík, CEO and founder of Codasip. “As RISC-V momentum grows, Codasip’s reach is expanding worldwide, and we need …
Brno, Czech Republic and Hamburg, Germany – February 28th 2018 – Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Trinamic, the global leader in embedded motor and motion control ICs and microsystems, has selected Codasip’s Bk3 processor for its next-generation family of products. Trinamic’s products serve multiple markets including laboratory and factory automation, semiconductor manufacturing, textiles, robotics, ATMs, and …
Brno, Czech Republic – January 23rd, 2018 – Codasip, the leading supplier of RISC-V® embedded processor IP, today announced that it has launched the 7th generation of its Studio, the unique IP-design and customization software that allows for fast configuration and optimization of RISC-V processors, customer-proprietary processor architectures, and their accompanying software development toolchains. Studio 7 adds significant new functionality and features, making …
Codasip CodeSpace and Codasip Studio are available for download in the latest version 7.0. The tools contain new features including: Update to Codasip MINGW 2, which includes MSYS2 and gcc 6.4.0 New interface methods in CodAL Integration of LLVM 5.0.0 Experimental support for AMBA busses For a full list of features please login to the support area and check the …
Learn how to incorporate Questa® VIP into your existing RISC-V verification flow. The tutorial, prepared by Codasip’s verification experts, explains the concepts of combining automatically generated UVM with QVIP and guides you through the process.
Brno, Czech Republic – November 28th, 2017 – Codasip, the leading supplier of RISC-V® embedded processor IP, today announced that it has expanded its Berkelium processor portfolio to include the Bk5-64, its first implementation of the 64-bit RISC-V ISA. Codasip now offers customers the broadest selection of RISC-V processors in the market, spanning from the ultra-low-power zero-stage Bk1 to the high-data-bandwidth, …
Codasip CodeSpace and Codasip Studio are available for download in the latest version 6.10. The tools contain new features including: Support for 2-wire JTAG (IEEE 1149.7) HDK configuration manager JTAG support for syscalls For a full list of features please login to the support area and check the changelog.
