What is SweRV Core EH2?

Blog, News & Docs

In mid-May, CHIPS Alliance announced the open sourcing of the SweRV Core™ EH2 and SweRV Core EL2 designed by Western Digital. These cores, as well as the earlier EH1, are now supported by Codasip’s SweRV Core Support Package which provides all of the components necessary to design, implement, test, and write software for a SweRV Core-based system-on-chip. But what is SweRV Core EH2?

More than Moore with Domain-Specific Processors

Blog, News & Docs

The Moore’s law has had remarkably long validity of almost half a century. Today, however, it is ceasing to apply, opening new pressing questions such as: How to make up for the fact that chip size cannot be effectively reduced any more? What is the new way to improve performance? Roddy’s blogpost digs into one of the most promising answers: Core customization. Read on!

Codasip Studio and Codasip CodeSpace 8.3 available

News & Docs, Press Releases

Codasip is pleased to announce the availability of Codasip Studio and Codasip CodeSpace 8.3.0. Key features of this release: Minimal runtime library and minimal runtime Memory Interface Arbiter Tightly Coupled Memory Full changelog is available at: https://support.codasip.com/​downloads/​changelog/ The release is available in the Downloads section of our website: https://support.codasip.com/​downloads/​software/ Any feedback on this release is welcome. Share it with us …