News & Docs

Visit Codasip at REUSE2016. We are happy to be part of REUSE2016 event Dec 1st 2016 with Codasip RISC-V processor IP and Processor development tools. http://www.reuse2016.com/

We are excited to be part of the SemIsrael event Nov 15th 2016. If you are planning on being there drop by and find out more about Codasip IP, RISC-V and Processor development tools. http://expo.semisrael.com/exhibition

We are proud to announce the latest version of Codasip studio is available for download, as well as a new member of the product family Codasip CodeSpace – an IDE (based on Studio) that is designed for ASIP and Codix SW designers. This release include many improvements and new features including; New PPA comparisons to highlight how changes impact the CPU …

We are proud to have the opportunity to be part of the RISC-V (riscv.org) activities at this years Linley Processor Conference. If you are planning on being there drop by the RISC-V demo table during the Tuesday Reception and say Hi. We will be demoing a Quantum Resistant Security implementation by SecureRF built on an extended version of our Codix-Bk …

Your design is not the same as anyone else’s, so why is your embedded processor? Codasip will be exhibiting at DAC in Austin June 6–8. Drop by booth #1113 to learn more about; Codasip Studio 6.0: See our improved profiling, debug and design tools that turn anyone into a processor designer. Codix IP Cores: Meet the newest members of the …

Codasip® is pleased to announce the availability of Codasip Studio 5.6 which while mainly a bug fix release, includes several C compiler improvements. C Compiler improvements in the 5.6 release are; Support for instruction emulation in CodAL (specify a sequence of instructions to perform an emulated operation) Allow use of Frame pointer register by register allocator when not in use …