Codasip Announces Latest RISC-V Processor

The Newest Codasip RISC-V Processor is Ideal for IoT Designs Brno, Czech Republic – August 21st 2017 – Codasip, the leading supplier of RISC-V® embedded CPU cores, today announced the newest addition to their Berkelium (Bk) family of RISC-V processors. The Codasip Bk-1 processor is an FSM processor targeted at the Internet of Things (IoT) by offering ultra-low power, the …

Codasip and UltraSoC collaborate on RISC-V trace support

UltraSoC today announced its work on adding trace functionality to the RISC-V specification, and Codasip along with 4 other IP vendors have pledged support. Read more in the announcement at http://www.ultrasoc.com/ultrasoc-announces-industrys-first-processor-trace-support-risc-v/

Codasip and TVS Deliver Advanced RISC-V Verification Solutions

Brno, Czech Republic – March 10th 2017 – Codasip, a leading RISC-V processor IP provider, and T&VS (Test and Verification Solutions), a leading verification services provider for semiconductor IP, hardware and software, today announced a broad collaboration to accelerate the verification of products based on the Codix-Bk series of RISC-V compliant processor cores. The partnership ensures companies can be confident …

BaySand, Codasip, Codeplay and UltraSoC accelerate IoT development with “silicon-to-intelligence” RISC-V platform

MOUNTAIN VIEW, CA, 29th November 2016 BaySand, Codasip, Codeplay and UltraSoC today announced an integrated IoT development platform based on the RISC-V open processor instruction set architecture (ISA).  The platform offers an open-standards-based solution that allows designers of systems-on-a-chip (SoCs) for IoT applications to get from concept to silicon with a high level of software integration in record time and …

Codasip and UltraSoC deliver advanced RISC-V SoC analysis and debug

San Jose, CA – Nov 22nd – Codasip, the leading RISC-V processor IP provider, and UltraSoC, the leading provider of semiconductor IP for on-chip analytics, performance optimization and hardware-based security and debug, announced a broad collaboration to integrate the Codix-Bk series of RISC-V compliant processor cores seamlessly with the UltraSoC environment. As RISC-V based SoCs enter the mainstream, the need …

Codasip and BaySand Partnership Makes RISC-V-Based ASICs an Ideal Choice for IoT Designs

San Jose, CA – Nov 9th 2016 – Codasip, a leading-edge processor IP provider, and BaySand, the leader in application configurable ASICs, announced that they are collaborating to make the Codix-Bk series of RISC-V compliant processor cores available on BaySand’s new UltraShuttle service in 65nm and 40nm. RISC-V is becoming a pivotal processor standard for leading-edge IoT device designs, and …

Codasip and SecureRF demonstrate RISC-V compliant Codix IP for secure IoT applications

AUSTIN, TEXAS — Design Automation Conference — June 6, 2016 — Codasip, a leading provider of Application Specific Instruction-set Processor (ASIP) IP, and SecureRF, a leading provider of security solutions for IoT devices, announced they will be demonstrating a RISC-V based processor that has been optimized to run IoT security applications at DAC (Austin, TX June 6–8, Booth #1113) and …

Codasip and CAST collaboration ships first products to customers

AUSTIN, TEXAS — Design Automation Conference — June 6, 2016 — Codasip, a leading provider of Application Specific Instruction-set Processor (ASIP) IP and tools, and CAST, a semiconductor intellectual property (IP) provider, announced today that the first CAST products created using Codasip’s tools are now available to customers. Codasip™ Studio, a comprehensive ASIP development environment, is able to generate a …

Codasip announces availability of Codasip Studio 6.0

The major theme for the 6.0 release has been scalability and the ability to create and reuse ASIP projects in a hierarchal manner. In addition there are significant small enhancements and bug fixes across every aspect of the tools. For a full changelog, please see the download section.