Highlights from 2022, a turning year for Codasip

Codasip team at RISC-V Summit 2022

The start of a new year is a perfect time to look back and reflect on the previous year and our company’s position. At the RISC-V Summit at the end of 2021, our CEO Ron Black said that Scaling is Failing, with regard to Moore’s Law, Dennard Scaling, and Amdahl’s Law, and the industry needs […]

5 things I will remember from the 2022 RISC-V Summit

Codasip at 2022 RISC-V Summit

After an intense week at the 2022 RISC-V Summit in San Jose, California, and a long journey back to Munich (30 hours!) I am back at our Codasip headquarters, fueled with energy and positive thoughts. I obviously had plenty of time in transit to reflect on the event which, once again, was unique in many […]

How to reduce the risk when making the shift to RISC-V

With the Intel® Pathfinder for RISC-V* program, Intel launched a development environment that enables companies of all sizes to start their RISC-V journey. Codasip makes its L31 RISC-V embedded core available to the embedded community through the program. We asked Vijay Krishnan, Intel Corporation, and Rupert Baines, CMO at Codasip, to tell us more about […]

5 good things about RISC-V

RISC-V has been around for some time now, and if you are here it’s because you have heard of it. But perhaps you still need to be convinced that it is the future? If you still wonder about its potential and benefits, here are 5 good things about RISC-V. 1. RISC-V IS AN OPEN STANDARD Let’s […]

Collaboration leading the way for broad RISC-V adoption

We recently announced a partnership with Intel as part of the launch of the Intel® Pathfinder for RISC-V, making leading RISC-V technology more accessible for prototyping, production design or research purposes using Intel FPGAs. Intel Pathfinder for RISC-V allows for a variety of RISC-V cores and other IP to be instantiated on FPGA platforms, with the ability to […]

DAC 2022 – Is it too risky not to adopt RISC-V?

I was fortunate enough to attend the 59th Design Automation Conference (DAC) in San Francisco last week. Aside from the Covid closure in 2020 I’ve been going to DAC since 1995. Many people, including me, arrived to the San Francisco with a bit of trepidation. After all, 58th DAC had low attendance and it was […]

Closing the Gap in SoC Open Standards with RISC-V

Closing gap in open standards with RISC-V

The semiconductor industry has changed hugely in the last 3 or 4 decades. Around 1980 some larger semiconductor companies were strongly vertically integrated, not only designed and manufactured their products, but even made their own processing equipment and in-house EDA tools. Today almost every semiconductor company uses 3rd party equipment for IC manufacturing and designs […]

RISC-V Summit 2021

Codasip team at RISC_V Summit 2021

Semiconductor scaling is failing to meet designers’ needs, customers want more heterogeneous compute” and “domain specific acceleration”

Is RISC-V the future?

RISC-V logo on a 3-way road

Is RISC-V the future? This is a question that we often get asked, and let’s assume that we mean ‘is the RISC-V going to be the dominant ISA in the processor market?’. This is certainly an unfolding situation and has changed significantly in the last five years.