Press Releases

Check out the latest news, posts, papers, videos, and more!

What's New in Codasip

Check out the latest news, posts, papers, videos, and more!
Codasip CEO Ron Black

12/02/21

Press Release

by David Marsden

Codasip appoints Ron Black as CEO

IAR and Codasip

11/30/21

Press Release

by David Marsden

IAR Systems and Codasip collaborate to enable low-power RISC-V based applications

Codasip and Imperas logos next to a chip

11/22/21

Press Release

by David Marsden

Codasip adopts Imperas for RISC-V processor verification

Codasip and XtremeEDA logos

11/04/21

Press Release

by David Marsden

Codasip expands ecosystem with XtremeEDA

Image

11/02/21

Press Release

by David Marsden

Codasip appoints Brett Cline to drive company growth worldwide

Karel Masařík Codasip President and Founder member of RISC-V committee

10/28/21

Press Release

by David Marsden

Codasip Founder Karel Masařík elected to RISC-V Technical Steering Committee

Codasip Studio diagram

10/26/21

Press Release

by David Marsden

Codasip boosts Studio Processor Design tools with AXI Automation

Simon Bewick Codasip Director of UK Design Center

09/21/21

Press Release

by David Marsden

Codasip Opens UK Design Center Led by Simon Bewick

Rupert Baines Codasip CMO Chief Marketing Officer

09/09/21

Press Release

by David Marsden

Codasip Strengthens Senior Leadership: Rupert Baines Joins as Chief Marketing Officer

Artificial Intelligence with Codasip L30 RISC-V processor

08/10/21

Press Release

by Lucie Jiráková

Mythic Licenses Codasip’s L30 RISC-V Core for Next-Generation AI Processor

06/22/21

Press Release

by Lucie Jiráková

Codasip Announces A71X RISC-V Application Core with Dual-Issue Capability

SEGGER and Codasip

06/22/21

Press Release

by Lucie Jiráková

SEGGER and Codasip Announce Cooperation on RISC-V

Codasip FPGA for RISC-V processors

04/21/21

Press Release

by Lucie Jiráková

Codasip Announces FPGA Evaluation Platforms for RISC-V Processor Cores

04/13/21

Press Release

by Lucie Jiráková

Codasip Releases a Major Upgrade of Its Studio Processor Design toolset with a Tutorial RISC-V Core

03/30/21

Press Release

by Lucie Jiráková

Codasip to Offer Secure Boot Solutions with Veridify Tools

03/23/21

Press Release

by Lucie Jiráková

Valtrix and Codasip Cooperate on Verification of RISC-V Systems

03/16/21

Press Release

by Lucie Jiráková

Ron Black Joins Codasip as Executive Chairman

03/09/21

Press Release

by Lucie Jiráková

Codasip Announces Commercial Add-Ons to SweRV Core® EH1

02/23/21

Press Release

by Lucie Jiráková

TianyiHexin Licenses Codasip L30 for Powering Intelligent Wearable Device Solutions

12/07/20

Press Release

by Lucie Jiráková

Menta eFPGA and Codasip Announce Technology Partnership

12/04/20

Press Release

by Lucie Jiráková

Codasip Announces Three New RISC-V Application Processor Cores Providing Multi-core and SIMD Capability

11/03/20

Press Release

by Lucie Jiráková

NeuLinker Licenses Codasip Bk5 and Studio for Powering Innovative AI and Blockchain Solutions

10/20/20

Press Release

by Lucie Jiráková

Codasip Announces a New Design Center in France

10/08/20

Press Release

by Jakub Svoboda

Codasip Studio and Codasip CodeSpace 8.4 available

08/05/20

Press Release

by Lucie Jiráková

Codasip and Metrics Design Automation Announce the Integration of the Metrics Cloud Simulation Platform in Codasip’s RISC-V SweRV Core™ Support Package Pro

07/21/20

Press Release

by Lucie Jiráková

Codasip Releases the First Linux-Capable RISC-V Core Bk7 Optimized for Domain-Specific Applications

07/14/20

Press Release

by Lucie Jiráková

VITEC Licenses Codasip Bk5 Core for Multi-purpose Use in Video Products

06/02/20

Press Release

by Lucie Jiráková

Codasip Extends SweRV Support Package to Include Western Digital SweRV EH2 & EL2 RISC-V Cores

04/23/20

Press Release

by Lucie Jiráková

Codasip releases Support Package for Western Digital’s first RISC-V SweRV Core

03/24/20

Press Release

by Jakub Svoboda

Codasip Studio and Codasip CodeSpace 8.3 available

03/18/20

Press Release

by Lucie Jiráková

Codasip Awarded European Union Horizon 2020 Funding for Developing New RISC-V Processors


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