Press releases
Check out the latest news, posts, papers, videos, and more!
What's New in Codasip

22 Jun, 22
Press Release
by David Marsden
Codasip adds Veridify secure boot to RISC-V processors

21 Jun, 22
Codasip Studio
by David Marsden
Codasip Studio Mac extends potential to design for differentiation with RISC-V

21 Jun, 22
Press Release
by David Marsden
Codasip L31 customizable RISC-V core is an Embedded World Best in Show

14 Jun, 22
Press Release
by David Marsden
Codasip appoints Mike Eftimakis as VP of Strategy and Ecosystem

10 May, 22
Press Release
by David Marsden
Codasip appoints SH Lee to deliver RISC-V innovations to Korean OEMs

03 May, 22
Press Release
by David Marsden
Codasip adopts Siemens’ OneSpin tools for formal verification

21 Apr, 22
Press Release
by David Marsden
Codasip appoints Jamie Broome as its Automotive VP

06 Apr, 22
Press Release
by David Marsden
Codasip appoints Japan EDA veteran

10 Mar, 22
Press Release
by David Marsden
Codasip University Program spurs innovation and boosts curriculums

03 Mar, 22
Press Release
by David Marsden
Codasip steps up its focus on Europe and appoints Till-Vattier as EMEA VP

24 Feb, 22
Press Release
by David Marsden
Codasip’s latest RISC-V embedded cores enable AI/ML edge customization

02 Feb, 22
Press Release
by David Marsden
Codasip appoints Functional Safety VP

02 Dec, 21
Press Release
by David Marsden
Codasip appoints Ron Black as CEO

30 Nov, 21
Press Release
by David Marsden
IAR Systems and Codasip collaborate to enable low-power RISC-V based applications

22 Nov, 21
Press Release
by David Marsden
Codasip adopts Imperas for RISC-V processor verification

04 Nov, 21
Press Release
by David Marsden
Codasip expands ecosystem with XtremeEDA

02 Nov, 21
Press Release
by David Marsden
Codasip appoints Brett Cline to drive company growth worldwide

28 Oct, 21
Press Release
by David Marsden
Codasip Founder Karel Masařík elected to RISC-V Technical Steering Committee
26 Oct, 21
Press Release
by David Marsden
Codasip boosts Studio Processor Design tools with AXI Automation

21 Sep, 21
Press Release
by David Marsden
Codasip Opens UK Design Center Led by Simon Bewick

09 Sep, 21
Press Release
by David Marsden
Codasip Strengthens Senior Leadership: Rupert Baines Joins as Chief Marketing Officer

10 Aug, 21
Press Release
by Roddy Urquhart
Mythic Licenses Codasip’s L30 RISC-V Core for Next-Generation AI Processor
22 Jun, 21
Press Release
by Roddy Urquhart
Codasip Announces A71X RISC-V Application Core with Dual-Issue Capability

22 Jun, 21
Press Release
by Roddy Urquhart
SEGGER and Codasip Announce Cooperation on RISC-V

21 Apr, 21
Press Release
by Roddy Urquhart
Codasip Announces FPGA Evaluation Platforms for RISC-V Processor Cores
13 Apr, 21
Press Release
by Roddy Urquhart
Codasip Releases a Major Upgrade of Its Studio Processor Design toolset with a Tutorial RISC-V Core
30 Mar, 21
Press Release
by Roddy Urquhart
Codasip to Offer Secure Boot Solutions with Veridify Tools
23 Mar, 21
Press Release
by Roddy Urquhart
Valtrix and Codasip Cooperate on Verification of RISC-V Systems
16 Mar, 21
Press Release
by Roddy Urquhart
Ron Black Joins Codasip as Executive Chairman
09 Mar, 21
Press Release
by Roddy Urquhart
Codasip Announces Commercial Add-Ons to SweRV Core® EH1
23 Feb, 21
Press Release
by Roddy Urquhart
TianyiHexin Licenses Codasip L30 for Powering Intelligent Wearable Device Solutions
07 Dec, 20
Press Release
by Roddy Urquhart
Menta eFPGA and Codasip Announce Technology Partnership
04 Dec, 20
Press Release
by Roddy Urquhart
Codasip Announces Three New RISC-V Application Processor Cores Providing Multi-core and SIMD Capability
03 Nov, 20
Press Release
by Roddy Urquhart
NeuLinker Licenses Codasip Bk5 and Studio for Powering Innovative AI and Blockchain Solutions
20 Oct, 20
Press Release
by Roddy Urquhart
Codasip Announces a New Design Center in France
08 Oct, 20
Press Release
by Jakub Svoboda
Codasip Studio and Codasip CodeSpace 8.4 available
05 Aug, 20
Press Release
by Roddy Urquhart
Codasip and Metrics Design Automation Announce the Integration of the Metrics Cloud Simulation Platform in Codasip’s RISC-V SweRV Core™ Support Package Pro
21 Jul, 20
Press Release
by Roddy Urquhart
Codasip Releases the First Linux-Capable RISC-V Core Bk7 Optimized for Domain-Specific Applications
21 Jul, 20
Press Release
by Roddy Urquhart
Codasip Releases the First Linux-Capable RISC-V Core Bk7 Optimized for Domain-Specific Applications
14 Jul, 20
Press Release
by Roddy Urquhart
VITEC Licenses Codasip Bk5 Core for Multi-purpose Use in Video Products
02 Jun, 20
Press Release
by Roddy Urquhart
Codasip Extends SweRV Support Package to Include Western Digital SweRV EH2 & EL2 RISC-V Cores
23 Apr, 20
Press Release
by Roddy Urquhart
Codasip releases Support Package for Western Digital’s first RISC-V SweRV Core
24 Mar, 20
Press Release
by Jakub Svoboda
Codasip Studio and Codasip CodeSpace 8.3 available
18 Mar, 20
Press Release
by Roddy Urquhart
Codasip Awarded European Union Horizon 2020 Funding for Developing New RISC-V Processors
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