Codasip Solutions

RISC-V Processors

The RISC-V® Portfolio

Our processor core portfolio combines two complementary processor families, Codasip RISC-V Processors and SweRV Cores™, to cover the widest range of design needs. Both families are based on the free and open RISC-V architecture to ensure longevity, compliance, and cost effectiveness.
On top of these immediately available options, if you have special needs, we can provide you with tools to create your own custom architecture and unique processor.

Codasip & SweRV cores at a glance

Complementary offerings with Codasip

Codasip RISC-V Processors
SweRV Cores
Developed by
Western Digital

Design tools used

Conventional EDA
32-bit cores available
64-bit cores available
Linux-capable cores

Cores with 3–4 pipeline stages

Cores with 5–6 pipeline stages

Cores with 7–9 pipeline stages

Cores with FPU

Commercial option

Dual-issue cores

Coming in late 2021
Cores with dual hardware threads

Multicore configurations


Licensing model

Open source