Below you'll find a list of all posts that have been tagged as “2020”
Looking at any processor IP, you will find that their vendors emphasise PPA (performance, power & area) numbers. In theory, they should provide a level playing field for comparing different processor IP cores, but in reality, the situation is more complex. Let us consider performance.
Codasip and Metrics Design Automation jointly announce the integration of the Metrics SystemVerilog RTL Simulation Platform within Codasip’s Pro SweRV Core™ Support Package.
Codasip announces the official release of Bk7, the most advanced core in the Codasip family of RISC-V processor IP to date, built specifically with customization and domain-specific optimization in mind.
Codasip announces that VITEC, the worldwide leader in end-to-end IP video streaming, has selected Codasip’s Bk5 RISC-V-based core for their cutting-edge digital video solutions.
Codasip announces the availability of support to the two new SweRV cores, EH1 and EH2. Both are now available, along with all necessary tools and workflows, within Codasip’s exclusive SweRV Support Package.
Codasip announces the official release of its exclusive SweRV Support Package – a comprehensive service for users of SweRV, the new RISC-V superscalar core developed by Western Digital and available free of charge within the CHIPS Alliance repository.
Codasip announces that it has received a Horizon 2020 award from the European Union. The award is aimed at developing processor cores for the rapidly growing market for integrated circuits for Internet of Things (IoT), connected cars, drones, and artificial intelligence.
