Customization? Yes! After tape-out? Yes!

Customization in the field

Another RISC-V Summit is behind us. It was a very well-attended event with many exciting talks and companies highlighting their products at the exhibition. One of the main themes was, once again, customization. Many people and companies, including Meta in their keynote, insisted on the importance of customization and how this key aspect of the […]

Custom processor design just became easier

Codasip & SmartDV partnership blog interview

One-stop-shopping for cores and peripherals Codasip and SmartDV recently announced joining forces to simplify and accelerate custom processor design by offering our customers the possibility to license Codasip RISC-V IP and the necessary peripheral IP from SmartDV under a single contract. To better understand this promising collaboration, we asked Erik Panu, SmartDV, and Mike Eftimakis, […]

When tapas meet tech: Barcelona’s RISC-V Summit feeds our appetite for innovation

Codasip team at RISC-V Summit Europe

Alright, let’s talk about Barcelona. Now, you might be thinking of mouthwatering tapas, smooth local wines, and the pulsing life in every corner of the city. It’s a foodie’s paradise for sure—and I took full advantage— but last week, Barcelona became a playground for tech enthusiasts too. The reason? The first-ever RISC-V Summit Europe. RISC-V […]

How to reduce the risk when making the shift to RISC-V

With the Intel® Pathfinder for RISC-V* program, Intel launched a development environment that enables companies of all sizes to start their RISC-V journey. Codasip makes its L31 RISC-V embedded core available to the embedded community through the program. We asked Vijay Krishnan, Intel Corporation, and Rupert Baines, CMO at Codasip, to tell us more about […]

Codasip’s Expanding RISC-V Offering

Codasip homepage custom compute

In the last three months, Codasip’s RISC-V processor offering has expanded considerably. For some years, Codasip has supplied Bk3 and Bk5 RISC-V cores aimed at low- to medium-complexity embedded applications. But recently four additional cores have joined the Codasip RISC-V offering.

What is SweRV Core EH2?

Codasip homepage custom compute

In mid-May, CHIPS Alliance announced the open sourcing of the SweRV Core™ EH2 and SweRV Core EL2 designed by Western Digital. These cores, as well as the earlier EH1, are now supported by Codasip’s SweRV Core Support Package which provides all of the components necessary to design, implement, test, and write software for a SweRV Core-based system-on-chip. But what is SweRV Core EH2?

Vidtoo Technology Licenses Codasip’s Bk3 RISC‑V Processor for High‑Performance Computing SoC

Munich, Germany – December 17th 2018 – Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Vidtoo Technology, a leader in semiconductor products for machine learning and high-performance computing, has selected Codasip’s Bk3 processor for future HPC chips. Vidtoo Technology, based in Hangzhou, China, focuses on high-bandwidth, high-performance, high-connectivity, artificial intelligence platforms and inference […]

Mythic Chooses Codasip to Deliver RISC-V Computing in their Revolutionary Neural Network Platform

Campbell, California – December 10th 2018 – Codasip, the leading supplier of RISC-V® embedded processor IP, announced today that Mythic, a leader in artificial intelligence (AI) computing technology, has selected Codasip’s configurable Bk3 processor and Codasip Studio for future neural networking chips. Mythic, based in Redwood City, California, and Austin, Texas, will deliver powerful, life-enhancing AI solutions […]