Rambus Selects Codasip Studio for SDK Development of RISC-V Processor

Codasip Studio Enables Fully Automated Development of the Processor Software Design Kit While Saving Significant Time and Resources Brno, Czech Republic – November 14th 2017 – Codasip, Ltd., the leader in RISC-V embedded processor IP cores, today announced that Rambus selected Codasip Studio for developing its next-generation RISC-V security products. Codasip Studio provides fully automated generation […]

Codasip and SecureRF demonstrate RISC-V compliant Codix IP for secure IoT applications

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AUSTIN, TEXAS — Design Automation Conference — June 6, 2016 — Codasip, a leading provider of Application Specific Instruction-set Processor (ASIP) IP, and SecureRF, a leading provider of security solutions for IoT devices, announced they will be demonstrating a RISC-V based processor that has been optimized to run IoT security applications at DAC (Austin, TX […]