Rambus Selects Codasip Studio for SDK Development of RISC-V Processor
November 14, 2017
November 14, 2017
Brno, Czech Republic – November 14th 2017 – Codasip, Ltd., the leader in RISC-V embedded processor IP cores, today announced that Rambus selected Codasip Studio for developing its next-generation RISC-V security products. Codasip Studio provides fully automated generation of the Software Design Kit (SDK) for RISC-V processors. Codasip Studio utilizes a high-level design flow based on a proprietary modeling language called CodAL that significantly reduces the amount of engineering time and resources required to create, verify, and validate SDKs for embedded processors.
“Security is the leading issue for IoT, automotive and other fast-growing markets, and it is critical for Rambus to deliver superior products to market in a timely fashion,” said Bret Sewell, SVP and general manager of the Rambus Security Division. “We selected Codasip Studio as a high-level design tool for SDK generation because it allows for fast design space exploration, and because of the high quality of results we are realizing in the automatically generated compiler toolchain.”
Rambus Security is a leading provider of IP cores, software and services, dedicated to delivering a secure foundation for a connected world. Their embedded security solutions are designed to address the worldwide threat to data integrity as more devices are connected to the cloud. Rambus foundational technologies protect nearly nine billion licensed products annually, providing secure access to data and creating an economy of digital trust between our customers and their customer base. Additional information is available at rambus.com/security.
The high degree of automation provided by Codasip Studio makes it easy to make use of the power of embedded processor design techniques. Tasks that traditionally take weeks or months, tying up specialized and expensive resources, are highly automated and can be completed in days, significantly reducing both design time and cost.
Capabilities of the RISC-V embedded processor only need to be described once in the CodAL high-level language, and from this single description, everything needed to design, integrate, and program the embedded processor is automatically derived. This eliminates the need to express the same functionality in multiple task dependent formats, and traditional manual tasks.
In addition to its processor design capabilities, Codasip Studio includes powerful debugging and profiling – which makes even the most complex embedded processor designs easy to manage.
Key features of Codasip Studio include:
“Codasip enables companies like Rambus to meet the demanding time-to-market requirements for security products by providing the unique automation of our Studio toolset,” said Karel Masařík, co-founder and CEO of Codasip. “Having selected Codasip Studio for their security products, Rambus can eliminate the burden of internally developing and maintaining a software toolchain, and focus their software resources instead on bringing high-quality products to market.”
Codasip delivers leading-edge processor IP and high-level design tools that provide ASIC designers with all the advantages of an open standard such as the RISC-V ISA, along with the unique ability to automatically optimize the processor IP. As a founding member of the RISC-V foundation (riscv.org) and long-term supplier of LLVM and GNU-based processor solutions, Codasip is committed to open standards for embedded processors. Formed in 2006 and headquartered in Brno, Czech Republic, Codasip currently has offices in the US and Europe, with representatives in Asia and Israel. More information on Codasip’s products and services is available at codasip.com.
Chris Jones, VP of Marketing