Processor architecture description language
Traditionally, processor cores have been designed using a hardware description language. We have developed a high-level architectural language called CodAL (Codasip Architecture Language) for processor design. All our RISC-V CPUs are designed in CodAL.
An architecture source license of the CodAL core allows you to customize the design by editing the CodAL description.
Designing with Codasip CodAL
The design team captures the entire processor description as a single source. Codasip Studio generates the hardware and software descriptions.
A single CodAL description can be used for:
– Generating the ISS, software toolchain, hardware description, and verification environment
– Optimizing architecture exploration and experimentation with design changes consistently reflected in software and hardware using
– Generating testbenches and a UVM verification environment to verify the RTL against a golden reference
Designing with traditional HDLs
Since the 1990s the majority of processor cores have been designed using a hardware description language (HDL) such as Verilog.
Limitations of this approach include:
– Hardware description not suitable for generating the software toolchain
– Creating a software toolchain by manually changing open-source versions such as GCC or LLVM
– Manually developing a verification environment
– Time consuming and error-prone manual developments
Benefits of CodAL
Compared with the traditional HDL design approach, using a CodAL description presents significant benefits.
Although CodAL differs in purpose to both standard programming languages and hardware description languages, it has a C-like syntax that is easy to learn. Studio provides an IDE for developing CodAL code.
CodAL is an integral part of the Codasip University Program with one of its goals being the development of a CodAL ecosystem to share knowledge, experiences, ideas, and designs.