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Resources
Blog
What’s new in Codasip
Learn more about Codasip, our products, RISC-V, industry news, and more.
03 Oct 2023
Processors
Formal verification best practices: towards end-to-end properties
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26 Sep 2023
Processors
Formal verification best practices: investigating a deadlock
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21 Sep 2023
Industry
Saving the planet, one byte at a time
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19 Sep 2023
Processors
Formal verification best practices to reach your targets
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12 Sep 2023
Codasip Studio
Configurable LLDB for (not only) embedded RISC-V processors
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31 Aug 2023
Codasip Studio
How the SYCLOPS project democratizes AI acceleration
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22 Aug 2023
RISC-V
RISC-V customization gets a standing ovation – no fragmentation drama!
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01 Aug 2023
Processors
What you should ask for instead of just PPA
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01 Aug 2023
Processors
Why you should stop asking for PPA
Read More
25 Jul 2023
Codasip Studio
Re-targetable LLVM C/C++ compiler for RISC-V
Read More
18 Jul 2023
Codasip Studio
Making the most of the 60th DAC
Read More
05 Jul 2023
RISC-V
It’s all about RISC-V code size
Read More
04 Jul 2023
Industry
Increasing design skills for custom compute
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27 Jun 2023
Industry
Custom processor design just became easier
Read More
15 Jun 2023
RISC-V
Developing a customized RISC-V core for MEMS sensors
Read More
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