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Learn more about Codasip, our products, RISC-V, industry news, and more.

03 Oct 2023Processors

Formal verification best practices: towards end-to-end properties

26 Sep 2023Processors

Formal verification best practices: investigating a deadlock

21 Sep 2023Industry

Saving the planet, one byte at a time

19 Sep 2023Processors

Formal verification best practices to reach your targets

12 Sep 2023Codasip Studio

Configurable LLDB for (not only) embedded RISC-V processors

31 Aug 2023Codasip Studio

How the SYCLOPS project democratizes AI acceleration

22 Aug 2023RISC-V

RISC-V customization gets a standing ovation – no fragmentation drama!

01 Aug 2023Processors

What you should ask for instead of just PPA

01 Aug 2023Processors

Why you should stop asking for PPA

25 Jul 2023Codasip Studio

Re-targetable LLVM C/C++ compiler for RISC-V

18 Jul 2023Codasip Studio

Making the most of the 60th DAC

05 Jul 2023RISC-V

It’s all about RISC-V code size

04 Jul 2023Industry

Increasing design skills for custom compute

27 Jun 2023Industry

Custom processor design just became easier

15 Jun 2023RISC-V

Developing a customized RISC-V core for MEMS sensors

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