Codasip
RISC-V Processors
RISC-V Processors
Our processor cores are built on RISC-V®, a modern open Instruction Set Architecture (ISA) and implemented in Codasip Studio™. This means that they are offered either using a conventional licensing model as RTL, testbenches and SDK, or by licensing the CodAL™ code used to create the core. If you license the CodAL, you can use the core as a quick starting point for your own custom design using our unique Codasip Studio toolset.
Why choose a Codasip RISC-V Processor?
Codasip RISC-V Processors at a Glance
Codasip offers three processor families:
- Small and energy-efficient Low Power Embedded cores
- More powerful High Performance Embedded cores
- Most advanced Application cores able to run Linux
In each of the families, you can choose from a number of series based on the microarchitecture complexity.
All the cores are fully customizable and adaptable to the unique needs of your project.
FPGA Evaluation Platform
If you would like to evaluate a single Codasip RISC-V core, you can use Codasip's FPGA evaluation platform. Codasip will supply you with an eval kit consisting of an FPGA bitstream, SDK and CodeSpace along with a step-by-step quick start guide. You should be up and running with your first C program in 15 minutes.
Please note that obtaining the package is subject to signing an Evaluation Agreement. You are welcome to contact us for more details.
The Codasip Embedded Processor Evaluation Platform based on AHB targets the cost-effective Digilent Nexys A7 FPGA board and is suitable for low-power and high-performance embedded cores such as the Codasip L30, L50, and H50X. It can be used for evaluating systems with either bare metal software or RTOS (e.g. FreeRTOS).
