Capability Hardware Enhanced RISC Instructions
Increasing processor securitywith Custom Compute
The first commercial implementation of CHERI technology
The real-life solution to protect your end users
CHERI has been primarily a research project until now! We recently proposed a CHERI extension for RISC-V in collaboration with the University of Cambridge and unveiled the first commercial implementation of CHERI-RISC-V: the X730 processor.
Bringing security to everyonewith Custom Compute
Privacy violation, reputational damage, financial loss, or even threat to human lives from an unsafe and unsecure product are not acceptable, be it IIoT, automotive, aerospace, or any other consumer product.
Using Codasip Studio, we have added built-in, fine-grained memory protection by extending the RISC-V ISA with CHERI-based custom instructions. To enable the use of these instructions, we are also delivering the software environment to take advantage of CHERI technology, bringing a full software development flow to add memory protection.
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