Read CEO Ron Black’s ‘An open letter regarding Cyber Resilience of the UK’s Critical National Infrastructure’

Blog

5 things I will remember from the 2022 RISC-V Summit

After an intense week at the 2022 RISC-V Summit in San Jose, California, and a long journey back to Munich (30 hours!) I am back at our Codasip headquarters, fueled with energy and positive thoughts. I obviously had plenty of time in transit to reflect on the event which, once again, was unique in many ways. A lot happened in a few days for us at Codasip as well as for the wider RISC-V community, and here are 5 things I will remember from this conference.

1. RISC-V is inevitable

If you have read our popular article 5 good things about RISC-V, you understand that RISC-V has a bright future. Could we even say that it is inevitable? At least, this is what Krste Asanovic, Charman of the Board of RISC-V International, and Calista Redmond, CEO, both stated in their respective keynote. Considering the current status of RISC-V from an industry acceptance and ecosystem perspective, and the fact that the industry wants the open standard ISA business model, then actually, yes, such a bold claim makes sense. RISC-V is everywhere (from small, embedded devices to data centers), companies and governments are investing in RISC-V, and the ecosystem is growing rapidly. By the way, if you haven’t yet, read our interview with Vijay Krishnan of Intel and our own Rupert Baines on how to reduce the risk when making the shift to RISC-V as they discuss the Intel® Pathfinder for RISC-V program.   

Codasip team at the RISC-V Summit

2. The 2022 Summit was about quality

The 2021 Summit that Rupert Baines, Codasip CMO, summarized in a dedicated article suffered quite a bit from the pandemic. As 2022 arrived, we were still not quite sure what to expect. Life is sort of back to normal for most of us in the industry, and attendance seems to continue to grow towards pre-pandemic levels. What we know, however, is that the audience and the people we met at the conference were genuinely interested. The key people looking at RISC-V were at the summit. As a team, we are very pleased with the discussions, customer meetings, and visitors we had at our booth.

Activity at Codasip booth

3. There are ambitious plans for automotive

“The semiconductor industry has changed and nowhere is this more visible than in the automotive industry. A new marketplace in automotive innovation and technology is taking shape with a battleground between existing pillars, tech giants and new business models.” These were the words of Jamie Broome, our very own VP of automotive, at the beginning of 2022 in this article on automotive innovation. It is no surprise to now see how many RISC-V vendors are working on and offering automotive processors. In his keynote, our CEO Ron Black addressed the specific needs of the automotive industry and explained Codasip’s rather unique approach to converting the battleground of the automotive marketplace into peaceful prosperity.

4. We will all need safe and secure products

We, at Codasip, believe that having security and safety embedded by design and allowing our customers to rapidly make changes to the design while maintaining safety, security integrity, and proof of the design – without a lengthy design cycle – is fundamental. That’s the message Ron Black conveyed in his keynote. This message was well received and we had great conversations with customers and partners alike on how we can collaborate to adopt a holistic view of safety and security. On this topic, our Dual-Core Lock-Step demo received all the attention it deserved both at our booth and in the lecture theatre. In 2023, we will make security reference designs available as the next step in enabling safe and secure custom compute.

Codasip demo and keynote at the RISC-V summit

5. Is verification really at the heart of all RISC-V processor designs?

I recently read a quote from W. Edwards Deming: ‘Quality cannot be inspected into a product… it must be built into it.’ Verification should be a concern and a priority for all RISC-V processor vendors. Is it? I am honestly not sure. I found our partner Imperas gave a very interesting keynote at the start of the conference spelling out the challenge of processor verification, and it was good to see them demo their tools. However, I was quite surprised by the limited number of technical sessions on the topic, since I am convinced that many companies take verification very seriously – we certainly do at Codasip. Let’s hope this will be more of a focus in future RISC-V events. The more we share, the better!

Codasip team end of conference 2022 Summit

Conclusion?

It was so good to meet everyone and feel the energy and positivity of the wider community. Nothing replaces a face-to-face conversation. It was also interesting to see so many very familiar faces and friends from my time at a previous company called Arm, as we are now all contributing in our own way to making RISC-V a success. This was also a great opportunity for our Codasip team to meet customers in person, even if they were not at the event, and have a great dinner together. We feel energized for 2023 and we look forward to seeing everyone at our next major conference: Embedded World 2023 in Nuremberg, Germany. See you there!

Other blog posts