Karel Masarik is the founder of Codasip and since January 2024 also a member of the board of RISC-V International. Recently, EY named Karel Masarik the regional Entrepreneur of the year 2023, which caused another Czech industry veteran, Václav Muchna of Y Soft Corporation, to dub Karel “the chip king”.
Founding RISC-V member
Where did all this start? I wanted to learn more and decided to ask Karel some questions.
Let’s start with a bit of background. Codasip’s public involvement with RISC-V began early in 2016 by being a founding member of the RISC-V Foundation and announcing the first commercially licensable RISC-V core. This was less than two years after the founding of Codasip, so RISC-V has been a consistent theme for over 8 years.
Q: Karel, when did you first become interested in RISC-V?
We started out as an EDA company. But customers came to us requesting reconfigurable IP, and they wanted the IP to be competitive with Arm IP. This was a big ask but I was confident to take on the challenge because I knew the potential of our tools. From 2015, we started developing our own MCUs. These were developed with our own instruction set, so not with RISC-V. The products were successfully commercially licensed by several customers (Rambus, Dongwoon Anatech, etc.). However, some customers had valid concerns about using a proprietary ISA. Who would support them if our company would not make it in the long-term? They wanted an ecosystem. I saw the potential of RISC-V providing this ecosystem and we ported our own MCUs to RISC-V in 2016. Considering the development of RISC-V since then, this was the right decision. Not only can we provide competitive IP, but we also add freedom of customization.
Q: What were your expectations for a new open ISA?
At that time, we were interested in using our processor design automation tool Codasip Studio to design efficient embedded cores. While we – and other smaller companies – had innovative ideas for cores, the grim reality was that Arm Cortex-M was a near monopoly ISA for embedded systems. Even with architectural innovation it was hard to persuade customers to try a new proprietary ISA. RISC-V was game-changing by being open and accessible. It also removed the biggest downside of Arm which was vendor lock, and its openness was a catalyst for developing a viable ecosystem.
The rise of RISC-V
Q: What advantages did you see in the RISC-V open standard?
The original developers of RISC-V did some smart things when they devised the RISC-V standard:
- To make the ISA an open standard rather than a microarchitectural implementation. This contrasts with OpenRISC, for example, who focused on open-source licenses for a RISC implementation. This meant that OpenRISC licensees could not innovate in microarchitecture in the way that is possible with RISC-V. The use of permissive licenses has also encouraged the adoption of RISC-V.
- To make the ISA scalable. RISC-V has been devised to apply to a wide range of processors from programmable state machines to high-performance computing and to support 32-bit, 64-bit and 128-bit wordlengths.
- To make RISC–V modular. The original RISC ISAs were minimalist – which brought some benefits – but they tended to be one-size-fits-all. RISC-V’s modularity enables it to be tailored to very specific computational needs while retaining the benefits of a standard base ISA. This approach is very timely given the end of traditional semiconductor scaling and the consequent need for custom cores.
Q: What were your expectations for the new RISC-V Foundation (now RISC-V International)?
An open standard requires a strong organization to develop the standard, ensure interoperability and to promote its ecosystem. We have seen, for example, how the Wi-Fi Alliance has ensured that stakeholders have benefited from successive evolutions of Wi-Fi. I have expected RISC-V International to ensure that the standard develops competitively and is effectively promoted within our industry.
Q: What has been the biggest breakthrough achieved by RISC-V International?
It is hard to point to a single breakthrough when there has been steady progress in many areas. The membership growth has been impressive. Even more impressive is that RISC-V is widely seen as the major alternative to well-established x86 and Arm architectures.
Q: What excites you about joining the board of Directors of RISC-V International?
With the way RISC-V is currently growing, and the way it is gaining traction in all kinds of industries, I am confident this trend will continue. I have been part of the RISC-V community since the beginning, and as a company we take an active part in many of the RISC-V International Working Groups. Joining the board is probably a natural progression. It’s a chance for me to continue to contribute to the community in a more formalized strategic way.
Q: How do you hope to contribute to the board?
Codasip is growing into a European RISC-V powerhouse, and we are unique in this position. I look forward to contributing a European perspective. Since I am also deeply involved with several projects in the European Union, I am in a good position to understand the priorities of the EU and European OEMs. In recent years I have become more of a politician, but at heart, I am very much still an engineer. I am passionate about innovation, and I hope to contribute to RISC-V reaching even further into new exciting application areas.
Future technology
So, what is next? Currently, Karel heads the dedicated innovation hub Codasip Labs. The hub is growing rapidly and is involved in several key European projects for ensuring innovation. True to his entrepreneurial spirit, once again Karel is at the center of building the technology of the future.
