RISC-V Processor Customization
One approach to creating application-specific processors is to take an existing core and to customize it. Working this way is efficient both in terms of design effort and time to market. Historically, many popular commercial architectures had fixed architectures. RISC-V’s open and modular instruction set makes it significantly easier to customize existing RISC-V cores. Another key enabler is to describe the RISC-V core in a processor description language allowing the RTL, verification environment, and software toolchain to be automatically generated.
Processor optimization requires customization
For many general purposes, a standard RISC-V product is a good fit. However, if you need optimal features and PPA for a certain workload, modifying an existing design is the most convenient way to create a processor tailored for its task. Codasip gives you the ability to freely customize a standard Codasip processor by modifying both the microarchitecture and the instruction set with Codasip Studio, our complete end-to-end architecture customization solution.
Design freedom
Get a Codasip architecture license and customize an existing Codasip core without any restrictions.
Differentiation
Take advantage of Codasip Studio and CodAL to optimize an existing design and create your own core in a cost-effective way.
Tuning designs to different workloads
Codasip RISC-V cores have been customized in a number of applications including artificial intelligence, wireless and audio processing.
Artificial Intelligence
Although many AI/ML applications run in the cloud or on GPUs, there is increasing demand to use such algorithms in edge applications with limited compute resources. Codasip RISC-V embedded cores can be enhanced by adding custom instructions to accelerate AI algorithms such as neural networks.
Wireless
Some wireless applications such as ultra low-power (ULP) IoT require complex arithmetic in a variety of word lengths (8-, 16-, 24- & 32-bit). As an alternative to DSP cores, Codasip RISC-V embedded cores have been extended with custom instructions which deliver the required arithmetic with a very small power overhead.
Audio Signal Processing
Some audio processing algorithms are not efficient on a general-purpose core. Instead, RISC-V custom instructions can be used to extend a Codasip embedded core to provide the target performance while having low power dissipation and good overall silicon area.
Using processor design automation to customize RISC-V processors
In customizing a RISC-V core to a particular computational workload, it is essential to be able to experiment with new custom instructions and to rapidly get feedback on the efficiency of the design. If the core is described in an architectural language, design exploration can be enabled by a processor design automation tool.
All Codasip RISC-V cores are designed using our unique CodAL architecture description language. The processor description in CodAL is developed using Codasip Studio. If you license the CodAL description of a Codasip core, you can use Studio to profile application software, to experiment with RISC-V custom instructions. Studio generates an LLVM software toolchain for the customized core. It also generates RTL, testbenches, and a UVM verification environment.