Highlights from 2022, a turning year for Codasip
The start of a new year is a perfect time to look back and reflect on the previous year and our company’s position. At the RISC-V Summit at the end of 2021, our CEO Ron Black said that Scaling is Failing, with regard to Moore’s Law, Dennard Scaling, and Amdahl’s Law, and the industry needs […]
Architecture licenses for RISC-V Custom Compute
I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp. In a traditional processor IP model, there is a clear distinction between an off-the-shelf IP license that gives some level of configuration but no customization, and […]
How to extend the ‘unscalable’ RISC architectures
Semiconductor scaling is failing to meet designers’ needs, customers want more heterogeneous compute” and “domain specific acceleration”
RISC-V Summit 2021 highlights
Semiconductor scaling is failing to meet designers’ needs, customers want more heterogeneous compute” and “domain specific acceleration”
It’s time to join Codasip and the RISC-V revolution
Customization arises from optimizing a processor IP core to handle a certain workload. In some case it makes sense to design a dedicated core from scratch, but in many cases an existing core may partially meet your requirements and can be a good starting point for your optimized core.