Let’s meet at the RISC-V Summit Europe 2025 in Paris, France! We are exhibiting at this key industry event on May 12-15. Visit our booth, talk to our team, watch our demos, and get started with your RISC-V and Custom Compute journey!
Panel – Accelerating Automotive Innovation with RISC-V: The journey from early adoption to industry wide deployment
Wednesday May 14 at 17:15
Panelists include Maricel Ventura, Principal Functional Safety Manager, Codasip
The Automotive industry is already adopting RISC-V to deliver the vehicles of tomorrow, based on its open nature, ability to scale across all types of in-vehicle compute, and the support and supply options given by its global ecosystem of members. In this panel we will discuss how we can accelerate the momentum of RISC-V in automotive, the benefits of using an open standard, how we can ensure quality, safety and security required by automotive, the priorities we need to work on together and how we can build a software ecosystem together to deliver future automotive innovation.
What’s new at Codasip?
Tuesday May 13 at 14:53
Presentation by Peter Shields, Senior Product Manager, Codasip
As the leading European RISC-V vendor, we have a lot going on. This talk will share our latest product updates including new possibilities for fast migration from Arm to RISC-V, new core customization features, and the latest progress in CHERI memory protection. We will also talk about our advancements in high-performance computing as part of the EU-funded DARE project.
Using CMSIS for simplified migration to RISC-V
Wednesday May 14 at 10:40
Demo by Keith Graham, Vice President of University and Customer Experience Program, Codasip
CMSIS was originally designed to enable Arm applications to run seamlessly across the Arm processor portfolio. By leveraging Codasip’s CMSIS-DSP and CMSIS-NN libraries, we enable applications developed for legacy Arm cores to run on cutting-edge, domain-optimized RISC-V implementations without the need for modifications to the software.
Posters
- Customized RISC-V In a Simple Game Console – Zdenek Prikryl
- Standardizing CHERI-RISC-V, CHERI TG specification and status update – Tariq Kurd
- Codasip’s X730 core, the word’s first commercially available CHERI-RISC-V application core – Tariq Kurd
- Efficient system-level support for CHERI capabilities – Mark Hill
- CHERI performance optimization – Carl Shaw