Rapidly explore the world of deterministic memory safety
Based on commercially available IP, Codasip Prime enables advanced development of memory-safe and secure software. The platform allows hardware and software engineers to evaluate and demonstrate the capabilities of CHERI technology, develop and run CHERI software, and integrate CHERI hardware into wider test systems.
Features and benefits
Hardware and software development kits
Codasip Prime features a high-performance FPGA system, including the processor and peripherals, and a full software development kit:
- FPGA board and bitstream containing:
- Codasip X730 64bit RISC-V CHERI Application CPU
- Peripheral and system IP
- Security IP for secure boot and secure debug (True Random Number Generator, Test Access Port Protection Unit)
- CHERI-specific IP (capability tag management for DDR memory)
- Out-of-the-box Linux demonstration image
- Debug probe
- CHERI Software Development Kit
- CHERI Linux
- CHERI C/C++ tool chain including compiler and debugger
- Secure Boot
- QEMU virtual platform matching FPGA
Codasip X730 is the first commercially licensable processor implementing CHERI-RISC-V. It is written using Codasip’s CodAL processor description language to maximize customization.
The baseline X730 microarchitecture is 64-bit and dual-issue. It has been extended to efficiently handle capabilities and implement CHERI’s new instructions and functions.
CHERI Alliance – A wider ecosystem
CHERI benefits from a strong ecosystem of companies and universities, that is why Codasip helped found the CHERI Alliance, bringing them together.
CHERI Alliance is a community interest organization promoting the global adoption of the CHERI security technology across the computing industry. Building on over a decade of pioneering research by the University of Cambridge and SRI International, CHERI introduces a proven architecture designed to enhance system security through fine-grained memory protection and software compartmentalization.
