RISC-V Summit 2021 highlights

Codasip team at RISC_V Summit 2021

Semiconductor scaling is failing to meet designers’ needs, customers want more heterogeneous compute” and “domain specific acceleration”

It’s time to join Codasip and the RISC-V revolution

Rupert Baines Codasip CMO Chief Marketing Officer

Customization arises from optimizing a processor IP core to handle a certain workload. In some case it makes sense to design a dedicated core from scratch, but in many cases an existing core may partially meet your requirements and can be a good starting point for your optimized core.

Domain-Specific Accelerators

A chip that represents a domain specific accelerator

For about fifty years, IC designers have been relying on different types of semiconductor scaling to achieve gains in performance. How do they do it when Moore’s Law and Dennard Scaling have been broken?