Codasip and Avery Partner to Improve Regression Test Methodology of RISC-V Processors
Brno, Czech Republic – November 8th 2017 – Codasip, the leading supplier of RISC-V® embedded CPU cores, today announced its partnership with Avery Design Systems, the provider of cutting-edge verification intellectual property (VIP) solutions for SoC and IP companies. Codasip develops licensable RISC-V processors, the Berkelium (Bk) series, via a unique customization tool called Codasip Studio, allowing for fast configuration and optimization […]
Codasip and UltraSoC deliver advanced RISC-V SoC analysis and debug
San Jose, CA – Nov 22nd – Codasip, the leading RISC-V processor IP provider, and UltraSoC, the leading provider of semiconductor IP for on-chip analytics, performance optimization and hardware-based security and debug, announced a broad collaboration to integrate the Codix-Bk series of RISC-V compliant processor cores seamlessly with the UltraSoC environment. As RISC-V based SoCs […]