Design for differentiation: architecture licenses in RISC‑V
May 16, 2022
May 16, 2022
I was discussing with a colleague about the concept of architecture license in RISC-V. I realized that, in the open-source world, it can be a little tricky to grasp.
In a traditional processor IP model, there is a clear distinction between an off-the-shelf IP license that gives some level of configuration but no customization, and a fairly expensive architecture license enabling a licensee to use the instruction set with their own custom microarchitecture.
With RISC-V, the complication comes from the fact that it is often described as “an open-source architecture”, so people believe that some source code is licensed. But actually that is not the case at all.
In a traditional model, things are quite straight forward. A standard license for Arm or MIPS lets the customer use an RTL design but not change it at all (aside from a few configuration options perhaps).
Meanwhile, for customers willing to spend a lot of money, an architecture license gives them the right to modify how a processor executes instructions (the issue width, the cache size, etc.). However, it does not generally give the right to modify the instructions (with some exceptions such as the Cortex-M33 that supports Arm Custom Instructions, allowing the implementation of bespoke data processing operations, or Cadence Tensilica).
In an open-source model such as RISC-V, things are somewhat different
The RISC-V architecture is usually described as “open-source”, which implies everyone can use it at no cost.
However, a better description of RISC-V is that it is an “open architecture” or “open standard”. In that sense RISC-V is like C, Wi-Fi or LTE with RISC-V International performing the role of (respectively) ANSI, IEEE 802.11 and 3GPP in defining and managing standards that people are free to implement as they choose. But that is a written standard – not an implementation or a microarchitecture.
Just as is the case with those other open standards, RISC-V licenses can either be open-source or commercial.
You can download open-source designs and have complete freedom to modify them however you wish. Boom, PULP, SweRV and other open-source designs give absolute freedom. But that comes with a cost: they are not supported, the verification is often troublesome, and they may not be of sufficient quality to use in a commercial design. Some companies do use them accepting those compromises; others are understandably wary.
Or you can buy a commercial RISC-V design. There are many companies offering high quality cores delivered as RTL with warranty and full product support. These can be an excellent solution for many customers. Then we are back to something similar to the traditional model: a sort of black box design – although based on an open-standard ISA – in that it cannot be modified or customized to address specific needs. But for many purposes that generic product will be a good fit.
Codasip, as a RISC-V core vendor, does a lot of business on this basis: customers buy a standard RISC-V processor core delivered as RTL and SDK, with high performance, “best-in-class” verification and full support. That is without any architecture license fees, to use it as it is, off the shelf.
But Codasip offers another option. This is an architecture license – and more – delivered as a source code in the CodAL processor description language.
Many of our customers buy a standard Codasip processor IP product delivered as CodAL source and then use Codasip Studio™ which enables them to modify it freely. We provide the flexibility to modify both the microarchitecture and the ISA, precisely what one needs to Design for Differentiation. Customization at ISA level brings higher performance and optimization. What is more, the power and elegance of the Codasip Studio toolset makes this very easy.
This is different to, for example, an Arm architecture license in three ways:
Arm, even with an architecture license, constrains what you are allowed to do. Codasip does not: it is your core and you have control.
Arm cores are developed internally, in traditional ways and not designed to be easy to modify. In contrast, all of Codasip’s cores are developed using Studio and are designed expressly to make customization (both ISA and microarchitecture) straightforward and efficient. That includes automatically creating the software toolchain (customized compiler etc) and verification.
Traditionally the limitation of architecture licenses has been both the cash cost of the license and the engineering resources (cost) required to take advantage of it. Codasip and Studio now make that far easier and hence more affordable with a complete end-to-end architecture customization solution. This dramatically changes the cost equation both of the architecture license fee and the engineering resources required.
Codasip offers the best of both worlds: a portfolio of high-quality standard cores that are a good fit for standard applications, with full verification and support. Or you can upgrade to a cost-effective architecture license, freely customize the core in an easy-to-use environment and have a unique product for your unique needs.
December 22, 2020
An instruction set architecture (ISA) is crucial to the development of processors and their software ecosystems. In the last half century, the majority of ISAs have been owned by single companies, whether product companies for their own chips/systems or processor IP companies who licensed their processors to chip developers. Does ISA ownership matter? Let’s consider three proprietary ISAs and their history.
Firstly, the Alpha ISA was developed by Digital Equipment Corporation (DEC) for its workstations and servers and was released in 1992. In the mid-1990s, this was considered a worthy competitor to SPARC and MIPS RISC architectures. However, the ownership of the ISA transferred to Compaq when DEC was acquired in 1998. Compaq in turn sold the rights to the Alpha ISA to Intel in 2001, and in the same year Compaq was acquired by Hewlett Packard. The last Alpha-based products were released in 2004, meaning that the ISA was effectively dead because of a series of acquisitions.
MIPS Technologies was spun out of Silicon Graphics as an independent IP company in 1998. For some years it enjoyed some success, particularly at the higher end of the processor IP market, and was only the second architecture to have Android ported in 2009. However, with a declining share price, MIPS sold 498 patents to AST and agreed to an acquisition by Imagination Technology in 2013. After Canyon Bridge acquired Imagination, MIPS was spun-out again ending up, after a series of transactions, as part of Wave Computing. As an artificial intelligence silicon provider, Wave is a potential competitor to some MIPS licensees.
Wave tried to encourage the adoption of the MIPS ISA in competition to RISC-V through their MIPS Open Initiative in late 2018. However, the licensing terms contained some onerous conditions relating to patents. In late 2019, Wave suddenly shut down the program, giving zero notice. The important lesson is that even if an ISA is open, its future is not secure if it is commercially owned. Seven years of ownership change have seen MIPS’ market share spiral downwards.
The third example is Arm, the biggest processor IP company of them all. Arm has long been seen as not only a big, successful IP company, but one offering “Swiss neutrality” in the semiconductor industry. Arm was quite distinct from both semiconductor companies and EDA companies. As such, it enjoyed a position of trust from its licensees as it did not have a conflict of interest. With its acquisition by SoftBank in 2016, Arm lost control over its destiny, even though SoftBank was not competing with its licensees. With the planned acquisition of Arm by NVIDIA, announced in September 2020, Arm will lose its neutrality completely. As a semiconductor company, there is a conflict of interest between Arm’s owners and its licensees, meaning it can no longer be trusted in the same way.
As can be seen from the ‘Tale of three ISAs’, the ownership of an ISA matters a lot, regardless of whether the ISA is commercially licensed or open. Acquisitions can lead to the disappearance of an ISA through merging of product lines or through making licensing difficult. Another motive for taking over a company can even be to kill off a competing product line, which in the case of an ISA could catastrophically impact licensees.
ISA ownership is one of the key issues that the developers of RISC-V have thought about. By transferring the ownership of the ISA to RISC-V International, the original developers of the ISA have assured its longevity. Longevity is assured both by the independent ownership of the ISA and the fact that licensees have a choice of IP vendors supporting the same open standard. Thirdly, once ratified, the ISA is frozen assuring software developers that their code will be able run on suitable cores indefinitely.
November 26, 2020
Everybody is familiar with commercial licensing from traditional processor IP vendors such as Arm, Cadence, and Synopsys. But in discussing the RISC-V Open Instruction Set Architecture (ISA), there is widespread confusion of terminology with RISC-V often being described as “open source”. Some have even accused vendors of commercial RISC-V IP such as Codasip or Andes as not being in the spirit of RISC-V. But what is reality? What does the RISC-V licensing model for processor IP look like?
Let’s look at definitions briefly. An open standard like C, Verilog or HTTP is defined by a document that is maintained by an independent organization. Thus, C is maintained by ISO, Verilog by IEEE, and HTTP by IETF. These organizations maintain the technical standards using a set of impartial rules. Such open standards are generally freely accessible.
With open source, the source code for a software package or the hardware description language source for a hardware block are made available using a license. Open-source licenses vary from restrictive ones, such as copyleft license, to permissive ones, such as Apache. An open-source license defines rights for using, studying, modifying, and distributing the code. A copyleft license will require that any modifications be open-sourced, while a permissive license will not.
RISC-V is an open standard, and the ISA does not define any microarchitecture or business model. Therefore, a RISC-V microarchitecture can be licensed either as a commercial IP license or as an open source one. Nothing is prescribed.
If we think of a classic commercial processor IP license, you are generally paying for:
In practice, the warranty is usually time-bound, and the indemnification is limited. However, for the licensee, the vendor has some commitments to fix a design if bugs are found, which is valuable particularly on a tight schedule. If a licensee is accused of patent infringement, intellectual property indemnification means that the vendor will either defend the accusation or settle it on behalf of the licensee.
Classic IP vendors have jealously guarded their own ISAs as well as their microarchitectures. A normal license bundles the use of the ISA with the microarchitecture and there are no rights to modify the deliverables. Very rarely such vendors have offered an architectural license which has enabled the licensee to use the ISA with their own microarchitecture, but such licenses have commanded substantial fees. One reason why RISC-V is very disruptive is that with a free and open ISA, one of the most valuable possible deliverables has no license fee.
Given that RISC-V does not prescribe microarchitecture or how it is licensed, there are both commercially licensed and open-source RISC-V IP cores. With an open-source license, you pay no license fee for the microarchitecture, but you also do not get all the benefits of a commercial license. Generally, deliverables have no warranty and are accepted “as is”. Similarly, there is not the indemnification that exists with a commercial license. If bugs are found, then either the licensee or the open-source community needs to fix them.
With commercially licensed RISC-V cores, the only fees are associated with the microarchitecture as the RISC-V ISA is licensed free of charge. With this license, you get the warranty, indemnification and bug fixing commitments normally associated with a commercial license.
We often get the question “Is RISC-V really open source?”. RISC-V is an open standard that allows companies to create RISC-V microarchitectures. Companies can then license the IP as either open-source or commercial. Which is the right choice for RISC-V? Both commercial licenses and open source licenses have advantages and disadvantages. You need to weigh up what is best for your design project.
At Codasip, we offer commercial RISC-V IP licenses and Codasip Studio technology that enables our customers to modify both the microarchitecture and the architecture.
In the past, commercial and open source licenses were seen as bitter competitors. However, in the software world, companies such as Microsoft have embraced both models. Microsoft offers commercial licenses, supports open source projects, and has cloud-based business models. Commercial and open-source RISC-V licenses can co-exist and complement each other.