Read CEO Ron Black’s ‘An open letter regarding Cyber Resilience of the UK’s Critical National Infrastructure’


Have you checked the hidden costs of deploying an open source RISC-V core?

It is often implied that if you use an open source processor core there are no costs associated with using it. Of course, the RTL may be free of a license fee and royalties and it might be possible to access a free of charge toolchain for RISC-V, but there are plenty of hidden costs associated with using the core in a real integrated circuit design.

If you are using the core in a production design, you are almost certainly wanting to use commercial EDA tools for verification, synthesis and static analysis checks. You also need to start developing your embedded software and will need access to a suitable instruction set simulator and/or FPGA emulation. Ideally, you will also want to access comprehensive documentation and customer support for using the core. A lot of elements are needed to successfully use the core in your design.

The bottom line is that none of the above activities are supported by simply accessing the open source RTL. It is possible to set up all of them from scratch but that comes with a significant engineering cost. It is important to count this cost of ownership before embarking on using an open source core. In reality, like an iceberg, the dominant costs are hidden.

There was a similar situation almost 30 years ago, when Linus Torvalds initially distributed Linux as floppy disk images. The installation procedure was complicated, and many early users struggled with it. The Linux world solved the problem by creating distributions that were much easier to use. What can be done to achieve the same for open source RISC-V cores? The answer to this question is just beginning to unfold.

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