Driving ASIL-grade innovation: Optimizing motor control performance and safety with Codasip and IAR
Modern motor control algorithms—particularly those employing Field-Oriented Control (FOC) with DQ0 transformations—demand precision, deterministic behavior, and rapid execution. These requirements are even more critical for electric and hybrid vehicles, where every watt-hour saved directly improves range and performance. Furthermore, the demands of functional safety of motor control units must be addressed where safety goals are […]
Bounded Customization in action: Codasip L150 and CORDIC acceleration for motor control
Electric motors are at the core of many automotive innovations; from high-efficiency powertrain and steer-by-wire systems to regenerative braking and active suspension. Whilst standard RISC-V embedded cores provide general baseline capabilities, performance, power, and cost can be optimized by adding dedicated custom instructions. In this blog, we introduce the new Codasip L150: a 3-stage, 32-bit […]
Design and implementation of a hardened cryptographic coprocessor for a RISC-V 128-bit core
Cryptography is a way of encoding and decoding information to guarantee its confidentiality and protection from unauthorised individuals. Within the realm of digital security and cryptographic algorithms, digital signatures play a critical role in establishing trust. Analogous to a physical signature, digital signatures leverage cryptographic algorithms to generate a unique mathematical fingerprint linked to the […]
Custom Compute for Edge AI: Accelerating innovation with Lund University and Codasip University Program
In recent years, the rapid advancement and adoption of Artificial Intelligence (AI) on the edge has brought about a surge in development. As AI models like ChatGPT become more prevalent and accurate, the computational requirements for inference also escalate. This necessitates architectural innovations aimed at reducing both power consumption and latency. The need for edge […]