What is RISC-V?
RISC-V is an open specification of an Instruction Set Architecture (ISA).
It describes the way in which software talks to underlying processor hardware. The RISC-V ISA is open so that anyone can build a processor that supports it. What RISC-V, however, is not a processor design or an open-source implementation. RISC-V based IP can be either open source or commercially licensed, such as Codasip processor IP.
The standard is maintained by RISC-V International, with members (including Codasip) coming from across the industry including software, systems, semiconductor and IP. The focus of member companies is on building a rich ecosystem of hardware and software that will rival or surpass that of alternative ISAs like Arm or x86.