Opening the world of Custom Compute to new applications
Codasip A730, the first member of the 700 family, is a versatile mid-range 64-bit application core ideal for a broad range of applications.
This flexible RISC-V core, available in single- and multi-core configurations, is 2x more performant than previous generations. A730 can run Linux and RTOS alike and is well suited to perform complex compute tasks in power-constrained devices.
Features and benefits
A730 is a 64-bit in-order dual-issue RISC-V core and targets mid-range applications. Software applications are supported by hardware multiplier and divider, and a Floating-Point Unit.
The A730 core is highly optimizable for more flexibility. You can adapt it to your specific use case by controlling several options including:
- Number of cores – one to four
- Memory protection with customizable memory map
- Branch prediction
- Instruction and data cache sizes
- Shared L2 cache size and associativity
- TLBs (Translation Lookaside Buffer)
The A730 core can be used with a rich OS such as Linux, with an RTOS or for running bare-metal software. It is designed to simplify software development, with essential features to support developers:
- Debug interface – using standard RISC-V Debug specification
- Instruction-accurate model – for fast execution of software, before hardware is available
- Cycle-accurate model – for software algorithm optimization, when time constraints require precise execution
- Full trace capability – in the cycle-accurate model, to hunt down hard-to-find bugs