Highly configurable embedded processor for small-area and low-power applications

Codasip L150 is a 32-bit RISC-V embedded processor, focused on real-time, small-area and low-power applications.

The core is highly configurable, allowing different performance points in the real time embedded space, including local memories for low-latency access, and including a tiny Floating-Point Unit (FPU) implementing Zfinx extension, as part of the RISC-V standard solution optimized for small cores.

Features and benefits

Configurable design

L150 block diagram

Codasip L150 is the latest addition to our 100 family of embedded RISC-V IP cores, recognized for their standout area and power efficiency.

Designed with real-time and performance-sensitive applications in mind, Codasip L150 strikes a strong balance between small area and scalable performance.

The inclusion of the Zfinx RISC-V extension, part of the RISC-V standard, enables floating-point operations using the existing integer register file. It is a compelling trade-off for the cost- and energy-effective embedded systems that still need floating-point capabilities without the burden of the entire F extension support. 

 

Meet Codasip Studio Fusion

The L150 core is easy to customize and verify thanks to Codasip Studio Fusion.

 You can configure the core from set options, create custom instructions within set bounds, or design freely. 

L110 embedded core

Licensing the L150 core

Choose the L150 IP licensing model that fits your needs:

  • A Codasip standard license contains all the benefits of a high-quality core, delivered in RTL, directly usable in your product.
  • A Codasip enhanced architecture license includes the full CodAL high-level description language for L110, to allow you to fully customize it.
Off-the-shell RISC-V CPU Delivered as RTL Production ready
Customizable RISC-V CPU Delivered as Codal source code Modifiable with Codasip Studio

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