Differentiated processors make differentiated products
What if you could create an application-specific processor by customizing an existing core? What if you could reduce your design efforts and time to market?
Guess what? You can.
By combining the potential of the modular RISC-V Instruction Set Architecture with our Custom Compute solutions, you can efficiently customize your core. From a single processor description, you can shape the product that you need.
Zig when others zag
Processor optimization requires customization.
If you use the same processor cores as your competitors how do you stand out? Your product is different. So design different.
Technology innovators need optimal features and PPA for a certain workload. And you can efficiently achieve this by modifying an existing design. We give you the ability to freely customize a standard Codasip processor by modifying both the microarchitecture and the instruction set with Codasip Studio, our complete end-to-end architecture customization solution.
Design freedom
Get a Codasip architecture license and customize an existing Codasip core without any restrictions.
Differentiation
Tuning designs to different workloads
Customize any of our Codasip RISC-V cores for your target applications. Others have done it. Successfully. Now it’s your turn.
Artificial intelligence
Wireless
Audio signal processing
Some audio processing algorithms are not efficient on a general-purpose core. Instead, RISC-V custom instructions can be used to extend a Codasip embedded core to provide the target performance while having low power dissipation and good overall silicon area.
Using processor design automation
to customize RISC-V Processors
In customizing a RISC-V core to a particular computational workload, it is essential to be able to experiment with new custom instructions and to rapidly get feedback on the efficiency of the design. If the core is described in an architectural language, design exploration can be enabled by a processor design automation tool.
All Codasip RISC-V cores are designed using our unique CodAL architecture description language. The processor description in CodAL is developed using Codasip Studio. If you license the CodAL description of a Codasip core, you can use Studio to profile application software, to experiment with RISC-V custom instructions. Studio generates an LLVM software toolchain for the customized core. It also generates RTL, test benches, and a UVM verification environment.
Your fast track to differentiation
Experimenting is essential. Time is critical. As you customize a RISC-V core, you want to test new custom instructions and quickly get feedback on the efficiency of your design. What you need is a processor described in an architecture language and a design automation toolset for easy architecture exploration.
We design all our cores in Codasip Studio using our unique CodAL architecture description language. You can do that too. When you license the CodAL description of a Codasip core, you can automatically profile your application software and experiment with custom instructions. Codasip Studio automatically generates for you an LLVM software toolchain for the customized core, RTL, testbenches, and a UVM verification environment.