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5 things I will remember from the 2022 RISC-V Summit


December 22, 2022

After an intense week at the 2022 RISC-V Summit in San Jose, California, and a long journey back to Munich (30 hours!) I am back at our Codasip headquarters, fueled with energy and positive thoughts. I obviously had plenty of time in transit to reflect on the event which, once again, was unique in many ways. A lot happened in a few days for us at Codasip as well as for the wider RISC-V community, and here are 5 things I will remember from this conference.

1. RISC-V is inevitable

If you have read our popular article 5 good things about RISC-V, you understand that RISC-V has a bright future. Could we even say that it is inevitable? At least, this is what Krste Asanovic, Charman of the Board of RISC-V International, and Calista Redmond, CEO, both stated in their respective keynote. Considering the current status of RISC-V from an industry acceptance and ecosystem perspective, and the fact that the industry wants the open standard ISA business model, then actually, yes, such a bold claim makes sense. RISC-V is everywhere (from small, embedded devices to data centers), companies and governments are investing in RISC-V, and the ecosystem is growing rapidly. By the way, if you haven’t yet, read our interview with Vijay Krishnan of Intel and our own Rupert Baines on how to reduce the risk when making the shift to RISC-V as they discuss the Intel® Pathfinder for RISC-V program.   

Codasip team at the RISC-V Summit

2. The 2022 Summit was about quality

The 2021 Summit that Rupert Baines, Codasip CMO, summarized in a dedicated article suffered quite a bit from the pandemic. As 2022 arrived, we were still not quite sure what to expect. Life is sort of back to normal for most of us in the industry, and attendance seems to continue to grow towards pre-pandemic levels. What we know, however, is that the audience and the people we met at the conference were genuinely interested. The key people looking at RISC-V were at the summit. As a team, we are very pleased with the discussions, customer meetings, and visitors we had at our booth.

Activity at Codasip booth

3. There are ambitious plans for automotive

“The semiconductor industry has changed and nowhere is this more visible than in the automotive industry. A new marketplace in automotive innovation and technology is taking shape with a battleground between existing pillars, tech giants and new business models.” These were the words of Jamie Broome, our very own VP of automotive, at the beginning of 2022 in this article on automotive innovation. It is no surprise to now see how many RISC-V vendors are working on and offering automotive processors. In his keynote, our CEO Ron Black addressed the specific needs of the automotive industry and explained Codasip’s rather unique approach to converting the battleground of the automotive marketplace into peaceful prosperity.

4. We will all need safe and secure products

We, at Codasip, believe that having security and safety embedded by design and allowing our customers to rapidly make changes to the design while maintaining safety, security integrity, and proof of the design – without a lengthy design cycle – is fundamental. That’s the message Ron Black conveyed in his keynote. This message was well received and we had great conversations with customers and partners alike on how we can collaborate to adopt a holistic view of safety and security. On this topic, our Dual-Core Lock-Step demo received all the attention it deserved both at our booth and in the lecture theatre. In 2023, we will make security reference designs available as the next step in enabling safe and secure custom compute.

Codasip demo and keynote at the RISC-V summit

5. Is verification really at the heart of all RISC-V processor designs?

I recently read a quote from W. Edwards Deming: ‘Quality cannot be inspected into a product… it must be built into it.’ Verification should be a concern and a priority for all RISC-V processor vendors. Is it? I am honestly not sure. I found our partner Imperas gave a very interesting keynote at the start of the conference spelling out the challenge of processor verification, and it was good to see them demo their tools. However, I was quite surprised by the limited number of technical sessions on the topic, since I am convinced that many companies take verification very seriously – we certainly do at Codasip. Let’s hope this will be more of a focus in future RISC-V events. The more we share, the better!

Codasip team end of conference 2022 Summit

Conclusion?

It was so good to meet everyone and feel the energy and positivity of the wider community. Nothing replaces a face-to-face conversation. It was also interesting to see so many very familiar faces and friends from my time at a previous company called Arm, as we are now all contributing in our own way to making RISC-V a success. This was also a great opportunity for our Codasip team to meet customers in person, even if they were not at the event, and have a great dinner together. We feel energized for 2023 and we look forward to seeing everyone at our next major conference: Embedded World 2023 in Nuremberg, Germany. See you there!

Lauranne Choquin

Corporate Marketing Manager

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Being a design verification engineer is fun and rewarding


November 21, 2022

Philippe Luc, Director of Verification at Codasip, talked to students of the UK Electronics Skills Foundation (UKESF) about what it is like to be a verification engineer.

On one hand the UKESF encourages young people to study electronics and pursue careers in this sector, and on the other hand Codasip is very keen to help prepare the engineers who will solve tomorrow’s technology challenges. Philippe’s talk was very well welcomed and we felt we should share it more broadly. If you are a student and wondering what to do next, this blog and his talk are for you.

Here is a sneak peak at the webinar, which we summarized for you in this blog.

Being a verification engineer is fun

In Philippe’s mind, being a verification engineer is fun. There is no daily routine, each project you work on is different, and each bug you find has its own story. What makes a good engineer is their ability to solve problems that never existed before. That’s even more true for verification engineers. This is something that you learn at school, but also throughout our career. Scratching your head, connecting the dots, finding the best ways to ensure quality through innovative techniques, there is no way you can get bored in your job. 

Being a verification engineer is rewarding

From processors in smartphones to smart cards and small embedded devices in your home, it is very rewarding to, one day, have in your hands a product you worked on.

But even before this happens, being a verification engineer is rewarding. If a design verification engineer has the luxury to take a specification and turn it into a quality, cost-efficient, energy-efficient, performant product that is ready when the market needs it, a verification engineer has the power to prove that all of the above works in every single situation, regardless of the configuration, program that is running, external environment, etc. 

Without the design – there is no product. Without verification of the design – there is no product either, it wouldn’t fit the quality requirement of any customer.

Did you know that Codasip has a University Program? Cooperation between Codasip and academia accelerates development of RISC-V processor IP, electronic design automation, and verification tools and methodologies.

What makes a good verification engineer

As mentioned before, a good verification engineer can solve problems that never existed before. In other words, what makes a good verification engineer is the right mindset. But, let’s not give away too much in this article. Philippe tells you more in the webinar linked at the bottom of this page. 

Verification engineers have a bright future

In the 1980s, we could count approximately one computer for 100 households. In the 2000s, it became one computer per household. Today, there are at least 10 processors just in your pocket! – and of course a lot more in the household now.

The electronics market is growing and evolving. Will our job still exist in 20, 30, 40 years? Based on today’s digital world, yes. Everything includes at least one processor. Smartphones, music players, cameras, earbuds, door bells, coffee machines, light bulbs, you name it. The technology will change, as we have seen it in the past, but the skillset students are gaining today will be similar. 

What’s next? 

If this blog post made you consider a career as a verification engineer, you should watch the full webinar where Philippe shares a lot more details and insights.

And then, have a look at our careers page – your future as a verification engineer may be with us at Codasip!

Lauranne Choquin

Corporate Marketing Manager

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How to reduce the risk when making the shift to RISC-VIn conversation with Vijay Krishnan, Intel Corporation, and Rupert Baines, CMO at Codasip


November 17, 2022

With the Intel® Pathfinder for RISC-V* program, Intel launched a development environment that enables companies of all sizes to start their RISC-V journey. Codasip makes its L31 RISC-V embedded core available to the embedded community through the program.

We asked Vijay Krishnan, Intel Corporation, and Rupert Baines, CMO at Codasip, to tell us more about this.

On the left: Rupert Baines – CMO at Codasip; on the right: Vijay Krishnan – GM, RISC-V Ventures, Incubation and Disruptive Innovation (IDI) Group at Intel Corporation

Vijay, what is the risk when making the shift to RISC-V?

There is real risk and then there is perceived risk. Regarding the former, any architectural transition adds complexity, but with RISC-V the entire hardware and software ecosystem is coming together in a manner which minimizes the real risk, while unleashing the long-term value that comes with an open, modular and modern instruction set architecture. The presence of cores like the Codasip L31 are making it easier and easier for customers to make that transition so they can reap the benefits of RISC-V. Sensors, security IP/software, IoT middleware and cloud connectivity available within the Intel Pathfinder for RISC-V IDE all help to mitigate perceived risk by demonstrating end-to-end capabilities at the pre-silicon stage.

Rupert, do you agree with this, and is RISC-V risky?

Well, the cool thing about RISC-V is that it is an open standard, and that brings so many possibilities. But that can also be a challenge! Endless possibilities make it harder to make a choice and the evolving ecosystem can be hard to navigate.

Intel has blazed a path with Intel Pathfinder for RISC-V by making a first selection of recommended vendors, and from that stamp of quality, companies can explore and evaluate what best fits their needs.

As a key RISC-V processor IP vendor, it was obvious for Codasip to be part of the Intel Pathfinder for RISC-V ecosystem. Our L31 core is quite versatile so we chose to make it available to the wider embedded community through the program. It is a low-power, general-purpose, embedded RISC-V core that balances performance and power consumption. From IoT devices to industrial and automotive control, or as a deeply embedded core in a larger system, it brings local processing capabilities into a compact area.

Who is going to benefit from this Intel & Codasip partnership?

Vijay: The initial beneficiaries are end-user segments addressed by the Codasip L31 core. Over time we hope Intel Pathfinder for RISC-V will include support from a broader range of Codasip cores. By harnessing our combined capabilities, we see a tremendous opportunity to accelerate the transition to RISC-V, thereby establishing it as a third mainstream compute architecture after x86 and Arm.  

Rupert: Companies of all sizes, really. From SMEs to start-ups and bigger players. We give everyone access to high-class silicon ready proof points to get started with their RISC-V journey in a standard and stable environment. If they wonder whether they should go with our L31 core, they can see their use case brought to life. With Intel Pathfinder for RISC-V, our core can be integrated with a growing set of complementary IPs, multiple operating systems, and toolchains for IoT and embedded applications.

How is the RISC-V ecosystem doing today?

Vijay: In addition to being open and modular, RISC-V is free and easily licensable. In less than 10 years since its inception, RISC-V has made remarkable progress, driven largely by a well-knit ecosystem that includes academia & research in addition to a breadth of commercial organizations. The opportunities are vast, and based on what we have seen to date, the RISC-V market will reward organizations that not only build competitive products, but also foster collaborative models within the ecosystem.

Rupert: The RISC-V community is growing rapidly and continuously gaining market traction. It is attracting everyone, from university researchers to major industry players. There have been new processors and new ISAs in the past. But what is different about RISC-V is the ecosystem, a critical factor in the success of a processor architecture. More and more players are joining, more and more software and tools are available, broadening the adoption of the ISA. This in turn is attracting more ecosystem partners in an accelerating virtuous spiral, and it is that spiral that is driving the success of RISC-V, in which Intel and Codasip play a major role for the embedded industry.

How is this partnership helping companies make the shift to RISC-V?

Vijay: By combining Codasip RISC-V IP with the Intel Pathfinder for RISC-V developer tools, we are making it easier for customers to go from product concept to a mature platform that includes silicon and software. Intel Pathfinder for RISC-V combines RISC-V IP with complementary security IP, accelerators for AI/ML, Vision and Audio processing, as well as sensor and middleware integration, thus providing an accelerated software development path for customers that reduces time to market, cost and complexity/risk.

Rupert: The program removes the barrier to the adoption of RISC-V by providing a level of standardization that can make RISC-V adoption easy with some level of consistency for the software developer community. By collecting vendors of different types, the program can kickstart the development of a new system by bringing together all the great capabilities already out there, including L31. You can instantly start an IoT application based on our L31 core, combine it with other IP, integrate security from Crypto Quantique, and verify it all using Siemens EDA even before committing to silicon.

Collaboration is key.

Those who collaborate are better set for success in RISC-V than those who don’t. Thanks to an ecosystem coming together, the risk of RISC-V is reduced, and you can easily explore options when you are ready to make the shift. Codasip and Intel are exploring further possibilities for collaboration, and you will see more offerings going forward, always with quality and ease of use in mind.

Note: The Intel® Pathfinder for RISC-V program has been discontinued by Intel on January 26, 2023. You can get access to an FPGA evaluation platform for our award-winning L31 core by sending a request through our L31 product page.

* © Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others. No product or component can be absolutely secure. 

Lauranne Choquin

Corporate Marketing Manager

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A Codasip Greece Design Center to extend leadership in EuropeIn conversation with Giorgos Nikiforos, Director of the Codasip Greece Design Center


July 20, 2022

Giorgos Nikiforos recently joined the company to lead the new Codasip Design Center in Greece. From the reasons for choosing Greece to his motivations and the focus of the new team, we asked him to tell us more about it.

GIORGOS, TELL US WHAT CONVINCED YOU TO JOIN CODASIP?

When I first heard of Codasip, it did not take me long to realize that the company is in a great place strategically and delivering strong products that the market needs right now. Beyond the quality processor IP we are building on RISC-V – which is becoming the inevitable architecture computing is gravitating towards – there is Codasip Studio, a unique processor design automation toolset that enables our customers to optimize their designs and differentiate in a unique way. I have always considered that automation is fundamental. It is great to be able to address a challenge with a solution, but if you can instead build a future proof, scalable solution which will make future challenges easier to solve, that is a game changer. And Codasip does just that with Codasip Studio.

After a couple of weeks working with the team, I am really convinced that we are developing something unique with a huge potential, and this would not be possible without the people of Codasip. Building such a technology and being successful is really down to the people and the company culture. I have seen levels of motivation, excellence, and proactivity that are required to drive innovation and an overall “never settle” mindset I strongly believe in.

Giorgos’ appointment as Director of Codasip Greece Design Center was announced in a recent press release.

YOU MENTIONED CODASIP STUDIO, HOW DO YOU SEE THE POTENTIAL OF SUCH A TECHNOLOGY?

The semiconductor industry today needs innovation choice. For our customers and future customers, the potential is huge and the applications limitless. The more I talk with people, the more ideas and possibilities I see. For our engineering teams, it is also an amazing opportunity to work on something unique. We build standard, best-quality RISC-V processor IP that the market needs today. But for those seeking differentiation, we provide the tool that will help them create unique products they can commercialize to their competitive advantage. By automating the generation of all the tools required to build a custom product – from simulators to synthesis tools, verification environment and compiler – Codasip is democratizing processor design like no one else.

And the potential of Studio is not a secret. Simply look at how Codasip is growing. We are expanding across Europe, more and more talented engineers are joining, familiar names who have been in the industry for many years in various companies are joining. The technology is here, the market is ripe, and there is a great future ahead for Codasip.

THERE AREN’T MANY SEMICONDUCTOR COMPANIES IN GREECE, WHY THIS CHOICE?

The European opportunity for developers and for the industry is growing rapidly. Codasip is a European company, and all our design centers are in Europe. We already had offices in the UK, Spain, Germany, France, etc. The reasons for choosing Greece are quite simple.

The country counts several excellent universities (including the University of Crete, the University of Patras, the Democritus University of Thrace, the National and Kapodistrian University of Athens, or the Aristotle University of Thessaloniki) and a research center in Crete (FORTH-ICS-CARV) for computer architecture. Greek engineers are talented but the lack of opportunities in the country is real. Like many others, I left Greece more than 10 years ago to find a job overseas. However, Greece is a great place to live and work and many engineers would rather stay here than move away.

Having a company like Codasip that believes in the potential of the country, recognizes the quality of its universities and wants to build on its engineers to extend its leadership in Europe and globally is unique. The new design center in Greece will add significant value for the company.

Codasip offices in Greece

CODASIP LAUNCHED ITS UNIVERSITY PROGRAM IN MARCH 2022, HOW DOES THIS TIE IN?

The Codasip University Program is great in a growth-stage company like ours. The idea behind it is that we need a new generation of processor engineers to solve tomorrow’s technology challenges: in security, artificial intelligence, and many other domain specific applications. The Codasip University Program supports research faculties, creating bilateral ties between academic institutions and industry: an ecosystem which will spur innovation and product development.

As we start working with some great universities in Greece, there will be possibilities for partnership.

WHAT WILL BE THE FOCUS OF THE CODASIP GREECE DESIGN CENTER?

We are going to build a team of talented engineers who will work together to grow as a group but also as individuals, to design and deliver the technology that addresses industry needs today and tomorrow. We really want to inject the Codasip culture into everything we do, whilst also adding our Greek DNA.

In terms of roles we are hiring to fill: building quality technology and IP requires designers, verification engineers, modeling, architects and more. We are looking for personalities and mindsets across all levels. We are at the beginning of the hiring process, we have job offers on our website and candidates should make contact and submit their applications.

Check our open positions in Greece

Lauranne Choquin

Corporate Marketing Manager

design automation to drive innovation and differentiation


July 7, 2022

With semiconductor scaling no longer being an option in most situations, optimization means customizing the processor for your specific application. With the right approach and right tools, processor design automation can enable innovation and differentiation. One way of achieving this is to create an application-specific processor by owning the design. To do this efficiently, manual efforts should be reduced to the minimum. Let’s see, in this blog post, how processor design automation can drive innovation and foster differentiation.

RISC-V is bringing design freedom to software and hardware developers

The semiconductor industry is facing scaling limitations (if you haven’t yet, read our white paper on semiconductor scaling) for new applications that require efficient execution of algorithms for data processing. For example, vision, voice and vibration applications. In this context, the only way forward to differentiate is architectural innovation.

The ideal baseline for differentiating is the RISC-V ISA. Free, open, and modular, it allows custom extensions to create a unique processor tailored for specific needs and applications. Most of the time, there is no need to create an entirely new product from scratch. Customizing an existing commercial RISC-V processor is the most efficient way to design a new product with optimal features and PPA.

This approach, which is getting more and more attention, brings new opportunities for software and hardware developers, with complete design freedom. These new opportunities also come with efforts that have not been experienced before. Indeed, any modification to the processor architecture must be reflected in both hardware and software, and be verified. To minimize efforts, make the best use of resources and reduce time to market, processor design automation is key.

Unlocking innovation with processor design automation and Codasip IP and tools

Customization requires the right tools and needs to be considered from the beginning. Codasip RISC-V cores are all designed in CodAL, with customization in mind, so they can be modified seamlessly. Based on C, CodAL is an architecture description language very close to standard programming languages, easy to adopt for processor design automation. This ownership gives you design freedom while keeping control of costs and resources.

Design freedom can start with architecture exploration. Codasip Studio with CodAL generates a Software Development Kit that includes all the tools software programmers will need. Profiling benchmarks, getting performance statistics, making some changes in the design, and seeing the results in just a few minutes: this is all possible with Codasip Studio. But that’s not all.

Codasip Studio workflow
Codasip Studio workflow

Studio and CodAL generate everything needed to be ready for production. Indeed, customization is not just about modifying the RTL. It also includes generating all tools required to design a quality core that can be monetized. Codasip customization solutions take care of this. Customers modify the core as needed in CodAL, the rest is automated.

This unique description language allows the automated generation of the hardware and software tools that are required. With a single, unified toolchain, our customers automatically get the RTL, simulators, testbenches, the verification environment, and a customized compiler that understands their custom hardware and how to take advantage of it. They create a unique product with tools that simplify processor design and verification for all developers.

Processor design automation with Codasip solutions is something we will talk about extensively at DAC 2022 in July, the Design Automation Conference held in San Francisco, California. If you would like to know more about it, visit us at our booth or book a meeting with us.

Visit us at DAC 2022

Lauranne Choquin

Corporate Marketing Manager

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March 16, 2022

Keith Graham has been appointed to lead the new Codasip University Program. From helping tomorrow’s processor experts to developing the technologies that will solve tomorrow’s technical challenges, and accelerating innovation, we asked Keith what it is all about. Keith explains how the University Program will help today’s engineering students become the next generation of processor engineers our industry needs.

Keith, why did you accept to join and lead the Codasip University Program?

Becoming the Head of Codasip’s University Program is my dream job. The technological challenges of tomorrow are yet to be solved and the next generation of processor engineers will need innovative, best-in-class IP and technology to achieve this. Before joining Codasip, I was already convinced by the benefits of customizing RISC-V processors using Codasip’s unique technology. Having many years of experience developing courses for the University of Colorado, it felt obvious to me that Codasip and universities could do great things together.

Over my thirty-seven years upon graduating Penn State, I have been a hardware design engineer, worked in start-ups, sold semiconductors, a small business owner, and a senior instructor at the University of Colorado at Boulder. It is time for me to give back to the next generation.

What was the idea behind developing research partnership with universities?

In the 1980s, it was an era that it was not difficult to find a company that was developing a custom processor, but it ended due to the need to standardize software. The number of mainstream processors narrowed to around 6 in the 1990s. Now, with the open architecture of RISC-V, it solves the issue of standardized software with the advantage of enabling processor customization.

To solve tomorrow’s technology challenges in security, artificial intelligence, and many other domain specific applications, we need a new generation of processor engineers.

We are at the start of a new golden age of processor designs. Through the University Program, we will be making available innovative curriculum material, supporting research faculty, and creating an ecosystem to spur innovation and product development.

Keith Graham. Head of University Program. Source: Keith Graham.

What can engineering students and researchers expect from the program?

The Codasip University program helps universities develop the theory and the design skills that companies developing tomorrow’s SoCs will need. Together with our technology partners we provide engineering students and researchers with the support they need for their research projects.

Students and researchers will be provided with computer engineering curriculums, assignments, materials, and industry-grade tools.

By partnering with universities, we create a Design for Differentiation Ecosystem that will encourage sharing of knowledge, experiences, ideas and designs. Universities will have access to FAQs, knowledge boards, a design database to share solutions, and will be able to participate in community activities such as design contests.

Which Codasip technology will students and researchers have access to?

The support of both the students and researchers will be through Codasip unique design automation toolset Codasip Studio and our High-Level Synthesis Language CodAL.

It is essential to provide students with access to CodAL and Studio. This unique technology will enable them to focus on becoming innovative processor designers. CodAL, our patented architecture description language, is more efficient and less error prone compared to using a less abstracted language like Verilog. Perfect for students.

With Studio, we want to provide the ideal processor design automation platform that will help future SoC designers build their ideas into something that could become a commercial product.

Interested in the Codasip University Program? Learn more on our website and get in touch with us.

Lauranne Choquin

Corporate Marketing Manager

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Three Reasons why Codasip Women Engineers are Awe-inspiring


March 3, 2022

With International Women’s Day behind us and International Women in Engineering Day on June 23rd, we wanted to put great women in engineering on the spotlight. But no Ada Lovelace or Hedy Lamarr in this article. Computer science is constantly evolving, becoming increasingly important in our world, and there are so many reasons for women to be involved. This blog gives the floor to the great women working as engineers at Codasip. We asked our female colleagues what it is like to be a woman engineer at Codasip. Annie, a hardware developer, Hana, a scrum master, and Dominika, an RTL Design Engineer, share their thoughts.

1. We make a difference and shape the future

At Codasip we offer RISC-V based processor IP. RISC-V is changing the business model of the industry but also enabling the creation of innovative and unique products. But it is not just RISC-V. Along with a portfolio of best-in-class quality processors, we develop and offer Codasip Studio™. This unique technology, described in CodAL™, enables processor customization and design automation. Being a female engineer at Codasip means working on products and technology that make a difference, enabling Design for Differentiation. You contribute to shaping the future of the semiconductor industry.

For Dominika, working on innovative technologies in the RISC-V processor field is rewarding. We like to say that Codasip has been a long well-kept secret, but that it will no longer be. Dominika already noticed it. “When I joined 2 years ago, Codasip was very much a start-up. The potential of Codasip IP and technology is huge, the company and what we do has evolved a lot and I am curious to see how we will grow and where this will take us.” Innovating and shaping the future of Codasip is very exciting.

2. Develop in a kind and diverse environment

The people at Codasip make Codasip. With colleagues from different countries across Europe, the US, and China, diversity is part of our company identity. It brings a diversity of thoughts, ideas and experiences, creating a working environment that fosters individual and team development. For Hana, being given responsibilities and taking initiatives is important to grow. “As a scrum master, I help build self-managed teams and an agile culture in the company. We encourage collaboration, flexibility, initiatives and ultimately build high-value products around motivated and valued individuals.”

Flexible working is another thing our women engineers particularly appreciate. Flexibility at work can mean different things. For Annie, it is great to be able to do home office or adapt working hours. For Dominika, it is important to be able to adapt your role as the company evolves and as you develop as an individual. “I first joined the IP team and then switched to RTL design in the Studio team. This is closer to what I studied, worked on in the past, and wanted to develop at Codasip. I like that Codasip allowed me to find what I like and want to do”.

What’s also great about Codasip? The start-up spirit we manage to keep while being a growing, well-established company in a high-growth technology market.

3. Inspire the next generation

It is not a secret, the number of women in tech is growing but is still far from impressive. Having more women in engineering will ultimately bring more women in engineering. And more female CTO, CEO, etc. But how do you inspire the younger generation?

When asked “What more can be done to promote greater participation of young women in engineering today?” in an EE World Online interview, Calista Redmond, CEO of RISC-V International, said: “The challenge we face as a society is that there is an impression that technology starts with a code on a computer. We need to reverse this ideology and start with thinking about the impact that technology can have.” Hana, our scrum master, would add that we must make sure the younger generation understands that what makes someone special is their personality, potential and way of thinking, rather than their diploma, age, or gender.

What makes someone special is their personality, potential and way of thinking, rather than their diploma, age, or gender.

RISC-V, processor customization and Design for Differentiation are the future of the semiconductor industry. One final thought from Annie: “If you are interested in CPU design, RISC-V technology and want to influence the impact that technology will have, then Codasip is the perfect company to be working at”. This aligns with the thoughts our CMO Rupert Baines shared in a blog post where he explains why it is the perfect time to join Codasip and be part of the RISC-V revolution.

Lauranne Choquin

Corporate Marketing Manager

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