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Dual-core lockstep

What is dual-core lockstep?

Dual-core lockstep (DCLS) is a redundancy technique for high-reliability computing used in safety-critical systems like aerospace, automotive, and industrial control systems.

In this configuration, two identical processor cores, or CPUs, operate in parallel, executing the same set of instructions simultaneously. The key feature of dual-core lockstep is that both cores execute the same instructions and compare their results at every step to ensure they match. If a discrepancy is detected, it indicates a potential error or fault in one of the cores, triggering a fault-handling mechanism. Further resilience can be added by delaying one core with respect to the other, adding temporal separation to prevent both cores from being affected by the same fault.


Does Codasip have a processor with dual-core lockstep?

Codasip L31AS is a 32-bit RISC-V embedded processor with TÜV SÜD ISO 26262 ASIL B certification. Part of our safety and security offering, this embedded processor is ideal either as a Main Controller or a Safety Island in a Functional Safety System. It includes 2 instances of Codasip L31 in a dual-core lockstep configuration along with Physical Memory Protection as a security feature. Visit the L31AS page for more information.

Why use dual-core lockstep?

Dual-core lockstep cores are used to enhance fault tolerance, improve reliability, and meet the stringent safety requirements of critical applications. They provide a robust and proven approach to building high-reliability computing systems that can withstand hardware faults and environmental challenges. Of course, faults can also be maliciously injected, and a DCLS architecture can increase the difficulty of these attacks.

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