Rambus Selects Codasip Studio for SDK Development of RISC-V Processor
Codasip Studio Enables Fully Automated Development of the Processor Software Design Kit While Saving Significant Time and Resources Brno, Czech Republic – November 14th 2017 – Codasip, Ltd., the leader in RISC-V embedded processor IP cores, today announced that Rambus selected Codasip Studio for developing its next-generation RISC-V security products. Codasip Studio provides fully automated generation […]
A Tale of Two Approaches to High-Performance IoT
EXTENSIBLE PROCESSORS VS ACCELERATORS – AND HOW RISC-V CHANGES THE DYNAMIC If you were to ask any good designer today what is the best architecture for an SoC that needs to manage complex DSP or high bandwidth traffic demands – you will almost always find the recommendation of using one or more off-the-shelf processors, complimented […]
Codasip announces availability of Codasip Studio 6.0
The major theme for the 6.0 release has been scalability and the ability to create and reuse ASIP projects in a hierarchal manner. In addition there are significant small enhancements and bug fixes across every aspect of the tools. For a full changelog, please see the download section.