Single unified toolchain empowering processor research
The RISC-V’s open Instruction Set Architecture (ISA) has spurred the innovation of free software tools and application software. Many of these software developments are software “islands” that must be combined through scripts. With different tools from different sources, continual interoperability is at risk and there is a support cost of monitoring and updating their interoperability. […]
Architecture optimization for university researchers
With closed processor Instruction Set Architectures (ISA) with limited access to processor Intellectual Property (Arm and x86), university professors have often limited their research to two main spheres: optimizing software algorithm(s) and external hardware. University researchers have not been able to consider optimizing the processor due to the lack of access to processor Intellectual Property […]
How Today’s Engineering Students Will Become the Processor Engineers of Tomorrow
Keith Graham has been appointed to lead the new Codasip University Program. From helping tomorrow’s processor experts to developing the technologies that will solve tomorrow’s technical challenges, and accelerating innovation, we asked Keith what it is all about. Keith explains how the University Program will help today’s engineering students become the next generation of processor […]