We weren’t sure what to expect from our first major attendance at a #RISCVSummit. Although we were a founding member of RISC-V – as we’ve been saying quite a lot recently – we have been hiding our light under a bushel.
We’ve certainly been busy though – enabling over 2 billion RISC-V cores with our RISC-V processor IP and Studio tools while helping customers use architecture licenses, customization and domain specific compute – but perhaps we neglected the publicity.
However, we are now growing seriously and we know we can’t rest on our laurels. So off to San Francisco we trotted…A magnificent team of seven Codasippers were at the Summit, including a raft of our senior execs: new CEO Ron Black, CRO Brett Cline and CTO Zdeněk Přikryl together with a US sales team and more. Mustn’t forget myself: CMO Rupert Baines!
With Omicron timed to spoil the party, the event’s attendance was never going to be the best ever. A lot of visitors sadly did have to cancel. But while numbers were down, there were still a lot of good meetings and great presentations. Interestingly, the Summit was busier than DAC with which it was co-hosted. DAC is of course a fundamentally important event in the design calendar, but it was clear that RISC-V still brings with it a sense of something new and exciting: a growth opportunity. And who doesn’t love a growth opportunity.
For those of us from outside USA it was also a great opportunity to meet customers face-to-face even if they were not at the event. Doing business over Zoom has been efficient but there is something magic that happens with a CTO, a whiteboard and an engaged customer architect.
Meanwhile, Filip enjoyed his first US trip and clocked up his tourist points.
Ron’s presentation on the end of scaling and need for heterogenous compute was particularly well-received – with plenty of nodding heads in the audience. Watch the video recording of ‘Scaling is Failing’ keynote address here. Ron recently put his thoughts into a blog
The Summit saw some new entrants into the RISC-V ring. It is great to see the growing interest in RISC-V – although you could say they’re late to a party that’s now well and truly underway! We know from our own experience that there are no shortcuts to catch-up.
There were also new launches from existing RISC-V vendors, but from our perspective nothing that changes our outlook nor our prospects on selling our next 2 billion cores.
Our friends at Imperas were making a very good point on the need for better verification in RISC-V – something we passionately believe in (and it was incredible how some people seem not to appreciate). Watch the Imperas RISC-V verification presentation here.
The fact is, the RISC-V market is ripe for domain specific designs, as Ron made clear from his presentation: Dennard, Moore’s, Amdahl’s,..these traditionally immutable laws of semiconductor design and scaling are, well, mutable!
If you missed the event, watch the presentation from Ron Black, Zdeněk’s 10 minute overview to custom instructions in RISC-V and contact us directly to find out how we can help you design the best possible processors to differentiate your product in an increasingly competitive marketplace.
