Paper

Creating domain-specific processors using custom RISC-V ISA instructions – Technical paper

How to create domain-specific RISC-V instructions

A recent catalyst for creating domain-specific processors has been the RISC-V ISA (Instruction Set Architecture). This 11-page white technical describes how to add domain-specific instructions (custom ISA extensions) and how to build all the needed tools in SDK, as well as implementing the custom ISA extension in RTL (for example System Verilog).

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