At RISC-V Summit 2022, Codasip, the leader in processor design automation and RISC-V processor IP, will present solutions for implementing safety and security in RISC-V IP. In addition, the company will demonstrate the benefits of its unique processor customization offering. The technology will be presented as demos in booth PG2 and in conference sessions.
This December, the #RISCV community – including the technical, industry, domain, and special interest groups who define the architecture’s specifications – will be in San Jose, California for four days of technology breakthroughs, industry milestones, tutorials, and relationship-building. The event is being produced in a hybrid format, with both in-person and virtual participation available. Codasip is a platinum sponsor of the summit, and will be presenting the following sessions:
On Tuesday, December 13, 10:35am – 10:45am, Ron Black, CEO is presenting on the topic Avoiding Murphy’s Law and Satan’s Law without selling your soul.
Tuesday, December 13, 3:30pm – 3:40pm, Paul Elliott, Safety and Security Architect will do a live demo of a RISC-V dual lock-step implementation for safety and security applications.
On Wednesday, December 14, 4:25pm – 5:10pm, Keith Graham, VP University Program and Customer Experience, will be part of the panel discussion RISC-V in education and training: Successes and gaps.
Anyone interested to learn more about Codasip’s offering can request a meeting.
Don’t miss Codasip at #RISCVSummit 2022.