Codasip A70 is a small, power-efficient 64-bit RISC-V application processor capable of running rich operating systems such as Linux. This processor is available in single, dual and quad-core configurations for increased performance without compromising efficiency.  You can make further improvements to area and power by using Codasip Studio to configure the A70. This allows the PPA to be tuned to your exact needs.

Features and benefits


Configurable design

The A70 is a 64-bit RISC-V application CPU (RV64GC / RV64IMAC). This single issue, in-order core targets low-power applications while supporting rich operating systems. Software applications are supported by hardware multiplier and divider and an optional FPU. The multi-core version features a cluster with full coherency, a shared L2 cache, and an interrupt controller compliant to the RISC-V standard.
The A70 core is highly configurable for more flexibility. You can adapt it to your specific use case by controlling several options including:
  • Number of cores – single, dual, and quad-core
  • Memory protection with customizable memory map
  • Branch prediction
  • Instruction and Data caches –cache size, associativity, and line size
  • Shared L2 cache (multi-core) –cache size and associativity
Its capability to connect to AHB, AXI-Lite or AXI interconnects make it a versatile core that can adapt to either very compact systems or more complex multi-core configurations.

Software development

The A70 core can be used with a rich OS such as Linux, with an RTOS or for running bare-metal software. It is designed to simplify software development, with essential features to support developers:
  • Debug interface – using standard RISC-V Debug specification
  • Instruction-accurate model – for fast execution of software, before hardware is available
  • Cycle-accurate model – for software algorithm optimization, when time constraints require precise execution
  • Full trace capability – in the cycle-accurate model, to hunt hard-to-find bugs


  • Hardware Development Kit  
  • Software Development Kit – including instruction-accurate and cycle-accurate models 
  • FPGA bitstream 
  • Scripts and testbenches for front-end and back-end 
  • Enabling software 
  • Documentation

FPGA evaluation

The evaluation kit includes: 

  •  FPGA bitstream 
  •  Software Development Kit 
  •  CodeSpace IDE 
  •  Step-by-step quick start guide

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