Compact NN accelerator in CodAL – Technical paper
Back to technical papers list
Recent years of IoT/IIoT evolution resulted in an important shift from cloud-level to device-level AI processing. It enables devices to run some AI tasks locally, thus minimizing security issues, data transfer costs, and latency. The ability to run AI/ML tasks becomes a must-have when selecting an SoC or MCU for IoT and IIoT applications.
Embedded devices are typically resource-constrained, making it difficult to run AI algorithms on embedded platforms. In this paper, Alexey Shchekin introduces the work conducted by the Codasip Application Engineering team to simplify such tasks from a software and hardware point of view. He explains in details how they used the L31 RISC-V core and Codasip Studio to explore and customize the design with the efficient and compact AI accelerator tightly coupled with the CPU pipeline.