News & Docs | Codasip

Codasip Announces FPGA Evaluation Platforms for RISC-V Processor Cores

April 21, 2021

Codasip announces two new FPGA Evaluation Platforms for easy testing of and experimenting with the capabilities of Codasip RISC-V IP. The Platforms are designed to target Digilent boards based on Xilinx Artix-7 and Kintex-7 FPGAs.

What is an ASIP?

April 16, 2021

ASIP stands for “application-specific instruction-set processor” and simply means a processor which has been designed to be optimal for a particular application or domain. So what exactly is the difference from a general-purpose processor?

Codasip Releases a Major Upgrade of Its Studio Processor Design toolset with a Tutorial RISC-V Core

April 13, 2021

Codasip announces the availability of Codasip Studio 9.0 and Codasip CodeSpace 9.0. Key features include productivity improvements such as a new LLVM-based SDK with a fast C/C++ compiler, the Linker Support Package, and the tutorial 32-bit/64-bit uRISC-V processor.

What You Should Consider When Choosing a Processor IP Core (E-Book)

April 12, 2021

Learn how to choose a processor IP core to best fit your needs in this 24-page e-book.

Codasip to Offer Secure Boot Solutions with Veridify Tools

March 30, 2021

Codasip and Veridify Security, a leader in securing and managing low-resource devices at the edge of the IoT, announce they have partnered to provide secure boot functionality for the Codasip Low Power Embedded RISC-V processors.

Valtrix and Codasip Cooperate on Verification of RISC-V Systems

March 23, 2021

Codasip and Valtrix Systems, the provider of design verification products for building functionally correct CPU and system-on-chip implementations, announce that they are cooperating on the verification of RISC-V-based systems.

What does RISC-V stand for?

March 17, 2021

Many SoC designers are already familiar with the benefits of RISC-V, the open and extensible computer architecture. But what does the name stand for?

Ron Black Joins Codasip as Executive Chairman

March 16, 2021

Codasip announces that semiconductor industry veteran Dr Ron Black has joined the company as Executive Chairman of the Board of Directors.

A RISC-V ISA Extension for Ultra-Low Power IoT Wireless Signal Processing

March 12, 2021

This work presents an instruction-set extension to the open-source RISC-V ISA (RV32IM) dedicated to ultra-low power (ULP) software-defined wireless IoT transceivers.

Codasip Announces Commercial Add-Ons to SweRV Core® EH1

March 9, 2021

Codasip announces three commercially licensed add-ons to the Western Digital SweRV Core® EH1. The add-ons enable the SweRV Core EH1 to be designed into a wider range of applications.