News & Resources
Check out the latest news, posts, papers, videos, and more!
What's New in Codasip

16 May, 22
Blog
by Rupert Baines
Design for differentiation: architecture licenses in RISC‑V

10 May, 22
Press Release
by David Marsden
Codasip appoints SH Lee to deliver RISC-V innovations to Korean OEMs

05 May, 22
Blog
by Jamie Broome
Building the highway to automotive innovation

03 May, 22
Press Release
by David Marsden
Codasip adopts Siemens’ OneSpin tools for formal verification

02 May, 22
Blog
by Keith Graham
Processor architecture optimization is not a barrier for university researchers

29 Apr, 22
Blog
by Philippe Luc
Building a Swiss cheese model approach for processor verification

21 Apr, 22
Press Release
by David Marsden
Codasip appoints Jamie Broome as its Automotive VP

08 Apr, 22
Whitepaper
by Roddy Urquhart
Semiconductor Scaling is Failing

06 Apr, 22
Press Release
by David Marsden
Codasip appoints Japan EDA veteran

04 Apr, 22
Blog
by Philippe Luc
Measuring the complexity of processor bugs to improve testbench quality

24 Mar, 22
Blog
by Roddy Urquhart
Closing the Gap in SoC Open Standards with RISC-V

16 Mar, 22
Blog
by Lauranne Choquin
How Today’s Engineering Students Will Become the Processor Engineers of Tomorrow
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